Micro Trace Buffer (MTB) in STM32L0 devices?

[seren]

Figure 1 in STM32L0 Series Cortex®-M0+ programming manual (PM0223/DocID025763 Rev 3) shows a "Micro Trace Buffer (MTB)" on the top right. I could not find further information on that, neither in the reference manual RM0377 nor in the data sheet of STM32L011x3 STM32L011x4.

In general, there is little information about MTB for Cortex M0+ on arm.com but I found nothing related to ST so far.

Is MTB available on STM32L0 Series? If so: where is it documented, how can it be used? Or is there a mistake in the programming manual?

[Tesla DeLorean]

Pretty sure the functionality is completely unrelated to the ST implementation, so functionality would be covered by standard ARM materials for debugger writers.

I'd imagine one could simply enumerate the units in the ROM TABLE to determine their presence.

[Uwe Bonnes]

Here the decoded ROM Table of a STM32L031

0000431:INFO:dap:DP IDR = 0x0bc11477 (v1 MINDP rev0)

0000435:INFO:ap:AP#0 IDR = 0x04770031 (AHB-AP var3 rev0)

0000440:INFO:rom_table:AP#0 ROM table #0 @ 0xf0000000 (designer=020 part=425)

0000442:INFO:rom_table:[0]<e00ff000:ROM class=1 designer=43b part=4c0>

0000442:INFO:rom_table: AP#0 ROM table #1 @ 0xe00ff000 (designer=43b part=4c0)

0000445:INFO:rom_table: [0]<e000e000:SCS-M0+ class=14 designer=43b part=008>

0000447:INFO:rom_table: [1]<e0001000:DWT-M0+ class=14 designer=43b part=00a>

0000448:INFO:rom_table: [2]<e0002000:BPU class=14 designer=43b part=00b>

0000450:INFO:cortex_m:CPU core #0 is Cortex-M0+ r0p1

Some FreeScale DRDM-KL25Z has

0000617:INFO:rom_table:AP#0 ROM table #0 @ 0xf0002000 (designer=00e part=000)

0000624:INFO:rom_table:[0]<f0000000:MTB-M0+ class=9 designer=43b part=932 devtype=31 archid=0a31 devid=0:0:0>

0000629:INFO:rom_table:[1]<f0001000:MTBDWT class=9 designer=00e part=000 devtype=04 archid=0000 devid=0:0:0>

This indicates that the MTB is some optional unit that ST probably did not instantiate.

[seren]

Uwe Bonnes, thanks for your efforts. I guess you are right.

Another indication that ST did not implement MTB in STM32L0 is a newer version of the programming manual (PM0223 Rev 4): This version also includes STM32G0 Series (additional to STM32L0 Series of Rev 3). It still has "MTB" in Figure 1.

According to ARM/Keil application note 321 (http://www.keil.com/appnotes/files/apnt_321_v0.96.pdf), "A Cortex-M0+ can have MTB Micro Trace Buffer" but "STM32G0 does not have MTB implemented"

So unfortunately, it is simply a mistake in the ST programming manual.