MDMA transfer data length effect on memory bandwidth

[SeyyedMohammad]

Assume I have 3 transfer from seprate area of D1 memory on MDMA channel each have length of Byte. If they having length of word. In both case transferring those three transfer will consume 3 cycle in MDMA and the bus. Or it uses some algorithm (for example: fuses them with some other transfer with it's fifo) to do the 3 byte in single cycle and reduce bandwidth, my opinion is thata it can't. Am I right?

[SeyyedMohammad]

I think I've catched the point, The less the transfer we have -> less link_node we have-> less LAR loading we have. optimize your MDMA to having less node. But I still not confident about data size, Does really smaller burst size cause fifo to optimize buss bandwidth? How?

[FBL]

In my understanding, the DMA burst size on the memory port and the FIFO threshold configuration should match. Also, the DMA FIFO mode allow software to do burst transactions which optimize the transfer bandwidth.

[Tesla DeLorean]

Doing single byte transfers with DMA seems an inefficient approach to any problem.

Resources are generally shared in a round-robin fashion.

I don't think any transistors are expending merging / folding multiple channels, or caching

[SeyyedMohammad]

Hi @Community member​ 

Interresting, could you plese explain more?

[SeyyedMohammad]

Hi @F.Belaid​ 

How it optimises transfers? Also could MDMA link node register update reduces D1 bandwidth? If so how?

[FBL]

Hi @SeyyedMohammad​, 

Burst enhance bus usage but might induce latency on other streams/masters.

Please check this application note. It details specific aspects of the MDMA by means of a use case in order to allow developers to take full advantage of MDMA.

STM32Cube Expansion Package for STM32H7 Series MDMA - Application note

[SeyyedMohammad]

Hi @F.Belaid​ 

Could you please describe it more quantitative (How?) rather than qualitative (Enhance bus usage). This is cool note but doesn't told anything about MDMA register reload effect on bus.

[FBL · Accepted solution]

Hi @SeyyedMohammad​,

Thank you again for your feedback. In fact, as mentioned in the AN5001, MDMA can pack and unpack (PKE) the necessary data to optimize the bandwidth via MDMA_CxTCR. 

Nevertheless, quantitative aspects could be a subject for an update in the AN5001 or a new application note.

[SeyyedMohammad]

Hi @F.Belaid​ 

Knowing these detail can help up to achieve high performance DSP on it's core. Thanks. That phrase you noticed: tells: yes it is optimizing. I'm waiting for your update on AN or new AN.😊