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Short read from multiple ADCs under DMA

frackers
Senior

Using a stm32f303RE Nucleo board which has 4 (independent ?) ADC blocks.

I'm trying to read a single channel from each of the 4 ADC under DMA simultaneously triggered from the same timer update event but I'm only getting about 30-40% of the data I'm asking for. Note that using 4 channels of a single ADC would result in skew as the reads would be sequential so I'd loose timing accuracy

A single channel works fine (ADC1/Chan 1) and using HAL_ADC_Start_DMA() with a length of 500, SamplingTime of ADC_SAMPLETIME_2CYCLES_5 triggered from TIM2 at 800KHz I get what I'd expect.

Running ADC2/Chan 5 at the same time (same speed & parameters) results in both blocks only receiving about 200 words of good data followed by 300 words of garbage (values close to 0). Adding ADC3 & ADC4 gets progressively less valid data.

What comes to mind are the following questions:

  • Can I trigger multiple ADC/DMA transactions from the same timer update event (the DMA seems to run OK)
  • Is there sufficient memory bandwidth to handle multiple ADC blocks running simultaneously
  • Since the data length appears to be OK I assume the failure is in the ADC, not the DMA
  • Is there a limitation on the ADCs that prevents them operating independently
  • Is there enough decoupling on the Nucleo VDDA line to keep the ADC supply stable

At present I have no other interrupt or DMA activity but eventually I'll be sampling Timer capture with another 4 DMA channels so if its a memory bandwidth issue I'm sunk!

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