low lever driver backup sram example

[Evan .1]

Is there an LL example to enable the backup ram.

This doesn't work:

   // Enable PWR clock

   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);

   // Enable Backup ram clock

   LL_APB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_BKPSRAM);

   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_RTCAPB);

   // Enable backup ram regulator

   LL_PWR_EnableBkUpAccess();

   LL_PWR_EnableBkUpRegulator();

   while (LL_PWR_IsActiveFlag_BRR() == 0);

   *(__IO uint32_t *) (BKPSRAM_BASE ) = 0x5A5A5A5A;

I can't find in the documentation what I forgot.

Thanks.

[Evan .1]

I changed my code to this:

void CPU_config_backupram(void)

{

   volatile uint32_t test;

   RCC->APB1ENR |= 0x10000000;

   PWR->CR1 |= 0x00000100;

   RCC->AHB1ENR |= 0x00040000;

   test = PWR->CSR1;

   PWR->CSR1 |= 0x00000200;

   while( (PWR->CSR1 & 0x00000008) != 0x00000008) ;

   test = PWR->CSR1;

}

PWR->CSR1 is still 0x34000.

So are there any other requirements?

Reading variable: test gives me the following error message:

Multiple errors reported.

1) Failed to execute MI command:

-var-create - * test

Error message from debugger back end:

-var-create: unable to create variable object

2) Unable to create variable object

3) Failed to execute MI command:

-data-evaluate-expression test

Error message from debugger back end:

No symbol "test" in current context.

4) Failed to execute MI command:

-var-create - * test

Error message from debugger back end:

-var-create: unable to create variable object

[Evan .1]

To the only code other execute before CPU_config_backupram is STM32F767ZITX_FLASH.ld and this function is this:

void SystemClock_Config(void)

{

 /* Enable HSE clock */

 LL_RCC_HSE_EnableBypass();

 LL_RCC_HSE_Enable();

 while(LL_RCC_HSE_IsReady() != 1)

 {

 };

 /* Set FLASH latency */

 LL_FLASH_SetLatency(LL_FLASH_LATENCY_7);

 /* Enable PWR clock */

 LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);

 /* Activation OverDrive Mode */

 LL_PWR_EnableOverDriveMode();

 while(LL_PWR_IsActiveFlag_OD() != 1)

 {

 };

 /* Activation OverDrive Switching */

 LL_PWR_EnableOverDriveSwitching();

 while(LL_PWR_IsActiveFlag_ODSW() != 1)

 {

 };

 /* Main PLL configuration and activation */

 LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_8, 432, LL_RCC_PLLP_DIV_2);

 LL_RCC_PLL_Enable();

 while(LL_RCC_PLL_IsReady() != 1)

 {

 };

 /* Sysclk activation on the main PLL */

 LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);

 LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);

 while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)

 {

 };

 /* Set APB1 & APB2 prescaler */

 LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_4);

 LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_2);

 /* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */

 SystemCoreClock = 216000000;

}

[Evan .1]

RCC->APB1ENR |= 0x10000000;

 PWR->CR1 |= 0x00000100;

 RCC->AHB1ENR |= 0x00040000;

 test = PWR->CSR1;

 PWR->CSR1 |= 0x00000200;

 while( (PWR->CSR1 & 0x00000008) != 0x00000008) ;

 test = PWR->CSR1;

This solved the problem. Somehow the debug environment uses an other image with the new source code?

[Piranha]

All bus prescalers should be changed before increasing frequency. Why do you set APB1 and APB2 after the clock change?

[Evan .1]

Copied this from an UART example. So I assumed it worked correctly. So please tell me how it is done correctly.

[Evan .1]

This seems the correct low level driver code for configure the backup ram:

void CPU_config_backupram(void)

{

// Enable PWR clock

   LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);

   // Enable Backup ram clock

   LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_BKPSRAM);

   // Enable backup ram regulator

   LL_PWR_EnableBkUpAccess();

   LL_PWR_EnableBkUpRegulator();

   while (LL_PWR_IsActiveFlag_BRR() == 0);

}

[Piranha]

I literally told you it in my previous post!