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Known issues with D-cache and FMC on STM32F7

dave2012
Associate III

Hi,

I'm using a STM32F765 clocked at 216MHz and when D-Cache is enabled it badly affects reads from a device connected via the external FMC address/data bus (NE1, 16 bit data, 10 bit address). The following pictures show the problem (note ringing is caused by non-optimum scope lead grounding)

D-Cache On:

0690X00000Buz5hQAB.jpg

D-Cache off (expected result & same time base as above):

0690X00000Buz6zQAB.jpgD-Cache off (expected result, zoomed in)

0690X00000Buz7EQAR.jpg

I've checked the datasheets and errata but there is no mention of the issue I'm seeing. My multi-layer board is well decoupled, has ground & power planes and traces are short.

Has anyone come across this issue with D-Cache affecting FMC accesses ?

Thanks

Dave

12 REPLIES 12
Stan
Associate

Hello,

I am facing same problem, FMC performs 8 instead of 1 write operation.

I have remaped FMC to 0xC0000000, but without result. Theoretically 0xC0000000 region of memory is not cacheable, so problem should be solved. Maybe there is problem with something else?

MPU configured to disable caching (for 0x60000000 and 0xC0000000) also did not work. I have tried many MPU configurations with no result, is it possible that I have missed the correct one?

I have also tried to invalidate cache data before FMC write operation, but without results.

To clarify situation:

MCU I am using is STM32H743. Ethernet, sdmmc and many other interfaces are active, so maybe there is some hardware interference?

I have observed that when I create new project with FMC only, remaping FMC bank to 0xC0000000 solves the problem. Unfortunately project I am working on is huge and additionaly made by someone else soI am afraid that recreation may result in some failures that I will not be able to recognise.

> Theoretically 0xC0000000 region of memory is not cacheable

It's not cached by default, but that can be changed in MPU.

Maybe the huge project contains MPU configuration you don't know about. Try to read out the MPU or place data breakpoints (watchpoints) to its registers to capture any writes to it.

JW

Stan
Associate

Thank you for your answer.

I've checked MPU register and there are 3 protected regions but all of them are refering to D2 RAM region.

The problem starts to be really annoying becouse I haven't made any progress since monday.