cancel
Showing results for 
Search instead for 
Did you mean: 

Issue with AD conversions

DBein
Associate III

We encountered a big issue with the ADC's in a project.

The G4 device has 4 ADC's configured (ADC1, ADC2. ADC3, ADC5).

ADC1 and ADC2 are sampled simultanious and triggered by HRTIMER1A interrupt with 4 channels each.

ADC3 and ADC5 are in independent mode and are triggered at different times by HRTIMER1B interrupt with 1 channel each.

The problem we encountered now is that the ADC1 samplings are not consistent.

It seems like there are always "steps" on which the measured voltages stay or alternate.

First I assumed some problem with the ADC multiplexing, however after disabling all but ADC1 the issue is still there. The signals at the ports are all fine and stable without noise, the Vref is external but stable as well as Vcc. It somehow looks like the ADC got damaged. I tested the same code on a Nucleo board with the same result. We got like 20 PCB baords, all use the same code, but about a third of the boards are messed up. Another weird thing is, that the ADC measurements and "steps" are getting much worse with increasing temperature.

We need urgent help...

32 REPLIES 32

​Did you use the code I send earlier?

Not all of our samples are from the same lot. But the ones we use in our design should be from the same.

Unfortunately I'm not in office today, but tomorrow I can continue testing on a second Nucleo board.

I will update you ASAP.

Igor Cesko
ST Employee

I used your simple code - one ADC converted in timer interrupt and result is sent to DAC output. I have monitored the DAC output (by oscilloscope) for large steps (like for 6-bit resolution). But I see always very smooth waveform (as ADC input is triangle waveform with small amplitude to see the steps on the oscilloscope: one step for 6-bit resolution is ~52mV). I tried several samples with no problem.

Regards

Igor

Igor Cesko
ST Employee

You wrote that results are worse by increasing temperature. What does mean worse? You reported that the result is only 6-bit wide. What happens if temperature is increased? Does the result become more incorrect (more bits are missing)? Or are there some another devices which started to have only 6-bit results? What temperature is reached?

Thanks for information.

I had used for testing the simple code you have sent.

Igor

DBein
Associate III

​I used a second Nucleo board with the same code that I send before.

I still get the weird 6bit ADC resolution. We are waiting now for new Nucleo boards and some new MCU's from ST.

Is it possible to get a code example from your side, which you tested and verified on a Nucleo board before?

Code requierements would be:

  • At least one ADC channel sampling with 12-bit on ADC1
  • One DAC in 12-bit mode for displaying the sampled channel
  • Timer interrupt for managing the ADC and DAC

Then I would be able to confirm if the problem is code related or somehow from our hardware / setup.

DBein
Associate III

​Short description of my test setup:

I use a functiongenerator and generate a sine wave with 1kHz and feed it directly to the PA0 pin.

Pin PA4 is connected to buffered DAC1CH1 and feeds back the measured voltage.

​When increasing the temperature, the 6-bit ADC steps stay the same, but the measurements start to toggle more frequenctly between two steps.

However, this isn't of priority now. We need to get the full 12-bit resolution.

It is good that you tried the same code, that means it is not code related.

I fear that it is either related to having an older device revision or some setup issue.

We probably could send one of our boards where we observe the issue to you for further investigation, but I will set up another bench first, to verify my results.

I plan to have a call with you guys later if we can't fix it before.

DBein
Associate III

​This one is unnesseary now, since you verified the test code already.

This is the waveform from DAC. you can clearly see the steps (about 64, however they aren't evenly distributed).

We checked another Nucleo board and one of our designs at another test bench and all show the same behavior.

This is really strange and too obvious to not to be detected before.

Yellow: DAC output at PA4 pin; Blue: signal from signal generator at PA0 pin

0693W000003RfQfQAK.png

MM..1
Chief III

I dont see code, what you use but some mistake must exist. As first how amplitude have your generator ? Realy use full range of AD and how DC offset.

Second how type parameter use DEBUG_SECTION_DAC1_CH1 ( ?) . 3.how big is ADC clock/speed/sample time vs out impedance of generator eq dB down...

I check your scoped graph and here isnt 1kHz but 50Hz

DBein
Associate III

​1. Signal generator amplitude is set to 1.3V and DC offset is 1.5V.

2. The DEBUG_SECTION_DAC1_CH1 macro only points to the DAC data register. This is working fine, I tested it with several waveforms generated by MCU itself.

3. ADC clock speed is 170MHz and sampling time is 6.5 cycles, but I tried 247.5 cycles with no improvement. Impedance shouldn't be the issue, the problem exists even when appliying variable DC signal.