2024-11-27 11:48 PM - last edited on 2024-11-28 02:43 AM by SofLit
Hello Guys,
We've our own board with STM32H743BIT6 mcu Integrated. We've tried to dump the code by using the external ST-LINK V3 Debugger with JTAG Interface. It works fine for first 3 - 4 times. But then after reaching the board for the 5th time we're getting the Err message as "Error: ST-link error (DEV_TARGET_HELD_UNDER_RESET)".
Tried Methods:
1. We've Pressed the reset button for 2-3 seconds after giving the connection request.
2. We had set the Mode as Under Reset and Hot Plug mode
3. We've tried with STM32CubeIde also, still not working.
Note:
JTAG NRST pin in ST-LINK V3 Debugger is held at Logic Low, without connection to the target. Is this ok?
Suggest us some Solutions to overcome this state!
If anyone has the ST-LINK V3 Schematics send us.
2024-11-28 02:02 AM
What tools are you using for programming - STM32CubeProgrammer? other?
@bsn_14 wrote:our own board with STM32H743BIT6 mcu Integrated. .
Please post the schematics
2024-11-28 02:30 AM - edited 2024-11-28 02:31 AM
For Programming STM32CubeIDE we're using. For downloading the program to the Board we're using STM32CubeProgrammer. We're using JTAG Connection.`
Schematics: Our NRST Schematic is attached Below.
2024-11-28 02:40 AM - edited 2024-11-28 02:46 AM
Hello,
We invite you to check first your HW. You can refer for example to STM32H743I-EVAL schematics / Power, debug & clock part:
TRST is connected to pin 3 and NRESET is connected to pin 15 of the JTAG connector.
2024-11-28 03:37 AM
We are using 14 pin JTAG and not 20 pin JTAG. Can we get schematics for ST-Link V3 MB1441B board?
2024-11-28 03:47 AM
Seeing this link https://www.st.com/en/development-tools/stlink-v3set.html#cad-resources
There is no schematics for ST-Link V3 MB1441B available which means it's not something will be shared. But you can inspire from STLINK-V3 schematics embedded on one of the NUCLEOs.
Example: https://www.st.com/resource/en/schematic_pack/mb1364-h753zi-c01_schematic.pdf
2024-11-28 04:05 AM - edited 2024-11-28 04:24 AM
This is not helping to resolve our problem. So, can we atleast know whether the JTAG_NRST (JNRST) output coming from STLINK-V3 is in which configuration i.e., whether in open drain or push pull?