Is there any way to know when a STM32H7 SPI master has completely finished sending data, in endless-transaction mode?

[DGast.1]

When transmitting in endless-transaction mode with the STM32H7 SPI periph. (that is, setting TSIZE = 0), how can I know when the master has finished transmitting all data? Not only that its Tx FIFO is empty (which could be done with TXP) but also that it has physically sent all the SCK pulses and so the SCK line is low.

Note: I know that setting TSIZE to something != 0 will allow me to wait for EOT to know the above, but I would like to do this in endless mode.

[S.Ma · Accepted solution]

Not familiar with H7 SPI, however SPI master completion usually points to RX completion and related DMA flags, if any. Worst case, putting a timer ch1 or etr onto SCK with prescaler will count the number of byte transfered (hack)