About DGast.1

DGast.1 · 2023-03-22

In stm32h743, in SPI, I have a slave device with interrupts enabled. In particular, I'm enabling all the error interrupts (UDR, OVR, CRCERR, FRE, MODF), and the RXP, TXP and EOTIE interrupts, in that order.If I enable EOTIE the first of all of them, ...

DGast.1 · 2023-03-22

I'm trying to debug a problem by which, if the EOT IRQ is enabled, an SPI slave enters an endless loop of ISR executions. I suspect it might be related with how IRQs are generated. According to the H7 user manual: The TXP interrupt is generated whene...

DGast.1 · 2023-03-12

I have a test running on a Nucleo-H743ZI2 board which consist on a SPI master and a SPI slave sending data to each other. In particular, the master sends the slave the following sequence: {0xaaaaaaaa, 0x55555555} and the slave sends the master the op...

DGast.1 · 2023-03-09

When transmitting in endless-transaction mode with the STM32H7 SPI periph. (that is, setting TSIZE = 0), how can I know when the master has finished transmitting all data? Not only that its Tx FIFO is empty (which could be done with TXP) but also tha...

DGast.1 · 2023-03-03

I want to send data from one SPI master to an SPI slave in the same MCU. I don't have separated bards for master and slave, they are in the same board. I'm using an STM32H7 MCU with the following configuration:SPI master:SPI slave:With the following ...

DGast.1 · 2023-12-15

Hi again,I have run another experiment, this time with the driver in Zephyr RTOS for H7's SPI. I have printed the SR register in the interrupt handler and had verified that the only flag that is enabled in several of the cases is TXP. This leads to t...

DGast.1 · 2023-03-31

I have done an experiment that seems to demonstrate the opposite @F.Belaid I have generated a configuration with STM32CubeMX to enable the SPI and send a 32 bit transaction with interrupts enabled and fifo thershold = 1. I have verified it works wit...

DGast.1 · 2023-03-30

I had the same problem. In my case, the root cause was that I had configured the clock tree to feed 52MHz to my USB peripheral. I downgraded it to 48MHz and it worked.

DGast.1 · 2023-03-22

Sorry, I meant if I enable it as I explained above, that is, after TXP. It's difficult to add the code to explain it as it is enabled within a RTOS' driver.

DGast.1 · 2023-03-03

I see @gbm , I was expecting the SPI device to be able to receive and store some data without any interaction of the SW, but you are right. In summary, I have enabled SPI3 global interrupts in the SPI3's NVIC tab, in STMCube32MX, and replaced my cod...

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In stm32h743, in SPI, enabling the EOT IRQ after the other IRQs are enabled makes the SPI ISR to be fired endlessly. Why?

In stm32h743, is the TXP interrupt fired endlessly until the Tx FIFO is full?

STM32H7 - SPI test will not work unless I add pull down resistors to the MISO line

Is there any way to know when a STM32H7 SPI master has completely finished sending data, in endless-transaction mode?

SPI slave doesn't receive information from SPI master in STM32h7

Re: In stm32h743, is the TXP interrupt fired endlessly until the Tx FIFO is full?

Re: In stm32h743, is the TXP interrupt fired endlessly until the Tx FIFO is full?

Re: STM32 NUCLEO-L073RZ USB Virtual COM Port Error: Device Descriptor Request Failed

Re: In stm32h743, in SPI, enabling the EOT IRQ after the other IRQs are enabled makes the SPI ISR to be fired endlessly. Why?

Re: SPI slave doesn't receive information from SPI master in STM32h7