Input pin in pull up mode is being in high impedance state

[Vladyslav8989]

I have set PA3 pin as input with pull up mode. But testing this pin by multimeter I get high impendance state (0.5V) on it. Must be 3.3V (logical 1). I use stm32F417ZGT6. 

[Andrew Neil]

welcome to the forum.

Please see  How to write your question to maximize your chances to find a solution for best results.

In particular, Please give details of your hardware.

[TDK]

The attached code initialized PA3 as input with pullup. No problems there. Nothing special about PA3.

The issue is likely with your hardware. It's also possible you're not measuring the actual pin. Show a picture of your setup, schematic, and what you're actually measuring.

[Vladyslav8989]

Schematic of PA3 port connecting

[Vladyslav8989]

Schematic of PA3 port connecting 

[Vladyslav8989]

but If to configure PA3 as output then toggle in cycle of it works

[waclawek.jan · Accepted solution]

Note, that the internal pullup is nominally 40kOhm, so it won't provide enough current to overcome an external 10kOhm pulldown to a valid logic 1 state.

Actually, if VDD is around 3V, a 40kOhm/10kOhm divider you have should result in cca 0.6V, matching your observation.

JW

[Vladyslav8989]

What I should to do to have logical 1 on PA3 input with pull up mode?

[mfgkw]

> What I should to do to have logical 1 on PA3 input with pull up mode?

Remove your external resistors...

[Vladyslav8989]

It's true, VDD = 3.3V