i have a problem with sync timer master slave in stm32f040

[eittinfo]

hi everyone

i try to Synchronization two timer together in master / slave mode

i have a problem when i enable another timer interrupt ,once of two sync timer freq was changed!!

you can see in my logic analyzer result

this is my code:

static void InitTimers(void)
{
	
	GPIO_InitTypeDef 					GPIO_InitStruct;
	TIM_TimeBaseInitTypeDef   TIM_TimeBaseStructure;
	TIM_OCInitTypeDef  				TIM_OCInitStructure;
	NVIC_InitTypeDef 					NVIC_InitStructure;
	
  RCC_AHBPeriphClockCmd	(RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB,ENABLE);
	RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1,ENABLE);
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3 | RCC_APB1Periph_TIM14,ENABLE);
	
	GPIO_InitStruct.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_10;
	GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF;
	GPIO_InitStruct.GPIO_OType=GPIO_OType_PP;
	GPIO_InitStruct.GPIO_Speed=GPIO_Speed_50MHz;
	GPIO_Init(GPIOA,&GPIO_InitStruct);
	
	GPIO_InitStruct.GPIO_Pin = GPIO_Pin_1;
	GPIO_InitStruct.GPIO_Mode=GPIO_Mode_OUT;
	GPIO_Init(GPIOA,&GPIO_InitStruct);
 
	GPIO_InitStruct.GPIO_Pin = GPIO_Pin_1;
	GPIO_InitStruct.GPIO_Mode=GPIO_Mode_AF;
	GPIO_Init(GPIOB,&GPIO_InitStruct);
 
	GPIO_PinAFConfig(GPIOA,GPIO_PinSource4	,GPIO_AF_4);
	GPIO_PinAFConfig(GPIOA,GPIO_PinSource10	,GPIO_AF_2);
	GPIO_PinAFConfig(GPIOB,GPIO_PinSource1	,GPIO_AF_1);
	
	TIM_TimeBaseStructure.TIM_Period = (SystemCoreClock / 1200 )-1 ; 
  TIM_TimeBaseStructure.TIM_Prescaler = 0;
  TIM_TimeBaseStructure.TIM_ClockDivision = 0;
  TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
	TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
	TIM_TimeBaseStructure.TIM_Period = 1;
  TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure);
  TIM_TimeBaseStructure.TIM_Period = (SystemCoreClock / 2400 )-1 ; 
	TIM_TimeBaseInit(TIM14, &TIM_TimeBaseStructure);
	
	TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
  TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
  TIM_OCInitStructure.TIM_Pulse = ((SystemCoreClock / 1200)/2) -1;
	TIM_OC3Init(TIM1, &TIM_OCInitStructure);
	
	TIM_OCInitStructure.TIM_Pulse = 1;
	TIM_OC4Init(TIM3, &TIM_OCInitStructure);
	
	TIM_OCInitStructure.TIM_Pulse = ((SystemCoreClock / 2400)/2) -1;
	TIM_OC1Init(TIM14, &TIM_OCInitStructure);
	
	//Set and enable interrupt
	TIM_ITConfig(TIM14, TIM_IT_CC1, ENABLE);
	NVIC_InitStructure.NVIC_IRQChannel = TIM14_IRQn;
	NVIC_InitStructure.NVIC_IRQChannelPriority=0;
	NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
	NVIC_Init(&NVIC_InitStructure);
	
  TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable);
  TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update);
	
	TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated);
  TIM_SelectInputTrigger(TIM3, TIM_TS_ITR0);
 
	TIM_Cmd(TIM1, ENABLE);
	TIM_Cmd(TIM3, ENABLE);
  TIM_Cmd(TIM14, ENABLE);
 
	TIM_CtrlPWMOutputs(TIM1, ENABLE);	
  TIM_CtrlPWMOutputs(TIM3, ENABLE);
	TIM_CtrlPWMOutputs(TIM14, ENABLE);
	
}
 
void TIM14_IRQHandler(void)
{
	//TIM_ClearITPendingBit(TIM14, TIM_IT_CC1|TIM_IT_COM);
	TIM14->SR = (uint16_t)~(TIM_IT_CC1|TIM_IT_COM);
}

i use timer 1 & 3 in sync master /slave mode

and use another timer 14 for free running with interrupt

when i enable timer14 intteerupt ,timer 3 freq changed!!

this result when timer14 interrupt is disable:

and this picture is when timer14 interrupt is enable:

you can see when interrupt enable for timer 14, freq timer 3 changed!!!

why this happened?

thnx for help

[waclawek.jan]

First, I never heard of STM32F040.

> TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update);

This generates a TRGO pulse upon TIM1 Update. The RM does not tell how long the pulse is, but I'd guess it's one internal timer clock long.

> TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Gated);

OK so you've set the TIM3 - which is clocked by the same internal clock - to be gated by that one-clock-long pulse. That is bound to go wrong, and that combination was never inteded to be used.

You may want to tell us, what do you want to achieve.

JW

[eittinfo]

i want use timer 14 as free running timer with interrupt , and timer 1 & 3 in sync master slave mode

when i disable timer 14 interrupt, timer 1,3 work fine as master slave mode

but when i enable timer 14 interrupt you can see timer 3 frequency changed!

and i don't know why this happend

[waclawek.jan]

> timer 1,3 work fine as master slave mode

As I explained above, with the gated mode it worked only incidentally.

> i want use timer 14 as free running timer with interrupt , and timer 1 & 3 in sync master slave mode

OK but what exactly do you want to achieve by having TIM1 and TIM3 as master-slave? Do you want to output some particular waveform on several pins? If yes, what waveform exactly? Do you want TIM3 to output half the TIM1 frequency? Then use External clock mode, instead of Gated mode.

JW