Hello everyone,
I need to implement the burst controller in HRTIM in order to load 3 compares of the master timer at once.
I am using low layer so I do not have a lot of info.
My .ioc setting are:
Then, in the DMA CH1 interruption I have something like that.
cmp_values[0] = cmp_value_C; // intended for the second burst register
cmp_values[1] = cmp_value_A; // intended for the first burst register
cmp_values[2] = cmp_value_D; // intended for the third burst register
LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_4);
LL_DMA_ConfigAddresses(
DMA1, LL_DMA_CHANNEL_4,
(uint32_t)cmp_values,(uint32_t)&HRTIM1->sCommonRegs.BDMADR , LL_DMA_DIRECTION_MEMORY_TO_MEMORY);
LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_4, 3);
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_4);
The problem I am encountering is that the 3 compare registers are updated only with the first element of the buffer. I have memory incremental desactivated. If I activate incremental in memory, it does note even load any compare. Also, the .ioc has no option of configuring memory to memory dma, so i need to go to hrtim.c generated code and change it.
I am skipping something? I didn't found any example using low layer. Using HAL it seems that the function HAL_HRTIM_BurstDMATransfer() triggers this burst transfer. But I do not know how to do it with LL. The only thing that I achieved is loading to all compare registers the value of cmp_values[0] with incremental memory disabled and memory to memory direction. With another configuration, compare registers are not updated.
Kind regards,
Pau Moreno
