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Help to use PA15 as GPIO Output on NUCLEO-L476RG

DZado.2
Associate II

Hi,

 I am a newbie with STM32. I need help.

I want to configure that PA15 pin (which by default is used as JTDI), as a GPIO output.

I've added the following two lines to the beginning of the generated code of MX_GPIO_Init():

LL_GPIO_SetAFPin_8_15(GPIOA,LL_GPIO_PIN_15,LL_GPIO_AF_5);

LL_GPIO_SetPinMode(GPIOA,LL_GPIO_PIN_15,LL_GPIO_MODE_OUTPUT);

But it does not work. I connected a LED and tried to change the state of the pin high and low,

but it did not work.

I appreciate if someone help me to figure out what I am missing.

Thanks

1 ACCEPTED SOLUTION

Accepted Solutions

@DZado.2 wrote:

I did two changes:

1) I removed the lines (as gbm proposed):

//LL_GPIO_SetAFPin_8_15(GPIOA,LL_GPIO_PIN_15,LL_GPIO_AF_5);

//LL_GPIO_SetPinMode(GPIOA,LL_GPIO_PIN_15,LL_GPIO_MODE_OUTPUT);

1) And I added 

LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);

in addition to

__HAL_RCC_GPIOA_CLK_ENABLE();

 

Now it is working. I have no clue why.

If I remove LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA), it does not work.

Would you please explain why?

 

 


I'm not sure? The LL and HAL are setting the same register/bit, though the LL is static inline

Look at the disassembly to see what each is doing.


// HAL
#define __HAL_RCC_GPIOA_CLK_ENABLE()           do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)





// LL
#define LL_AHB2_GRP1_PERIPH_GPIOA          RCC_AHB2ENR_GPIOAEN

LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);

__STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs)
{
  __IO uint32_t tmpreg;
  SET_BIT(RCC->AHB2ENR, Periphs);
  /* Delay after an RCC peripheral clock enabling */
  tmpreg = READ_BIT(RCC->AHB2ENR, Periphs);
  (void)tmpreg;
}

 

Tips and Tricks with TimerCallback https://www.youtube.com/@eebykarl
If you find my solution useful, please click the Accept as Solution so others see the solution.

View solution in original post

10 REPLIES 10
gbm
Lead III

Is the GPIOA enabled in RCC? Setting AF is not needed, it's enough to set the output mode. You may do the same via CubeMX.

My STM32 stuff on github - compact USB device stack and more: https://github.com/gbm-ii/gbmUSBdevice
Karl Yamashita
Lead III

You haven't indicated if you enable the GPIO clock?

 

LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);

 

KarlYamashita_0-1734466006067.png

 

Tips and Tricks with TimerCallback https://www.youtube.com/@eebykarl
If you find my solution useful, please click the Accept as Solution so others see the solution.

Thanks for your reply.

I did by the HAL function: __HAL_RCC_GPIOA_CLK_ENABLE();

I am not sure if I can mix up the LL and the HAL functions together :)

I did enable RCC by this API: __HAL_RCC_GPIOA_CLK_ENABLE();

It does the job. Doesn't it?

Yes, either way should set the bit.

Which L4 are you using?

Are you using a Nucleo board or a custom board?

Tips and Tricks with TimerCallback https://www.youtube.com/@eebykarl
If you find my solution useful, please click the Accept as Solution so others see the solution.

I am using  NUCLEO-L476RG

(not a custom board)

 

I did two changes:

1) I removed the lines (as gbm proposed):

//LL_GPIO_SetAFPin_8_15(GPIOA,LL_GPIO_PIN_15,LL_GPIO_AF_5);

//LL_GPIO_SetPinMode(GPIOA,LL_GPIO_PIN_15,LL_GPIO_MODE_OUTPUT);

1) And I added 

LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);

in addition to

__HAL_RCC_GPIOA_CLK_ENABLE();

 

Now it is working. I have no clue why.

If I remove LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA), it does not work.

Would you please explain why?

 

 

Karl Yamashita
Lead III

It seems you've added code manually. So have any peripherals been enabled that could be using that same pin? 

Tips and Tricks with TimerCallback https://www.youtube.com/@eebykarl
If you find my solution useful, please click the Accept as Solution so others see the solution.

@DZado.2 wrote:

I did two changes:

1) I removed the lines (as gbm proposed):

//LL_GPIO_SetAFPin_8_15(GPIOA,LL_GPIO_PIN_15,LL_GPIO_AF_5);

//LL_GPIO_SetPinMode(GPIOA,LL_GPIO_PIN_15,LL_GPIO_MODE_OUTPUT);

1) And I added 

LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);

in addition to

__HAL_RCC_GPIOA_CLK_ENABLE();

 

Now it is working. I have no clue why.

If I remove LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA), it does not work.

Would you please explain why?

 

 


I'm not sure? The LL and HAL are setting the same register/bit, though the LL is static inline

Look at the disassembly to see what each is doing.


// HAL
#define __HAL_RCC_GPIOA_CLK_ENABLE()           do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)





// LL
#define LL_AHB2_GRP1_PERIPH_GPIOA          RCC_AHB2ENR_GPIOAEN

LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);

__STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs)
{
  __IO uint32_t tmpreg;
  SET_BIT(RCC->AHB2ENR, Periphs);
  /* Delay after an RCC peripheral clock enabling */
  tmpreg = READ_BIT(RCC->AHB2ENR, Periphs);
  (void)tmpreg;
}

 

Tips and Tricks with TimerCallback https://www.youtube.com/@eebykarl
If you find my solution useful, please click the Accept as Solution so others see the solution.