Hello,
I am facing random HardFaults on a STM32F722. They happen at various places in code, sometimes even during stack's initialization.
Stack's analysis do not show any risk of overflow : most of the time, the problem happens while executing main() loop, and stack's width is never more than 2 levels.
Looking at Fault status Registers shows:
_ bit FORCED of HFSR is set to 1
_ CFSR = 0x1000000 = bit UNALIGNED of UFSR set to 1: unaligned memory access.
bit UNALIGNED_TRAP is set to 0
Looking around PC and LR, I only see "unoffensive" instructions (typically, ldr, str, or ldr.b and str.b), and the code registered in stack is part of my main's infinite loop, which most of the time executes without any trouble. So I do not understand how it could sometimes trigger a memory alignment fault...!
I read https://community.arm.com/developer/ip-products/processors/f/cortex-m-forum/43707/unable-to-determine-offending-instruction-usage-fault-illegal-unaligned-load-or-store-cortex-m7-keil-mdk-pro, and the associated links, but did not find what could trigger this fault on my board.
One track that seemed interesting was https://www.keil.com/support/docs/3777.htm, but I am not using an external SDRAM...
I also saw the following topic, which seems to be exactly the same issue than mine: https://community.st.com/s/question/0D50X00009XkiJw/stm32f7-hardfault-unaligned-memory-access?t=1612969638024. But my HCLK is at 16 MHz, so, according to STLM32F7xx's reference manual, the only latency that I can use for flash accesses is 0 WS, which is already the case...
I am using HAL for startup code and basic (while(1)) fault handlers (so I do not understand why my UsageFault escalated to HardFault, as UsageFault handler is pressent in my code).
I am using gcc and gdb with Atollic TrueStudio as IDE.
Can you please help me to solve this issue?
Regards
