HAL SPI DMA Transmit Question

[Jean Paul Talledo Vilela]

Posted on November 08, 2017 at 08:00

I am working with a DAC that requires the CS signal to be asserted/release on every command which it is 24 bits. Using normal SPI HAL functionality there is a idle/dead time between clocks for each byte being transferred.

So I tried HAL SPI DMA transaction which burst the 24 bits but it takes more time to get to the interrupt as you can see on the attached snapshot. The blue channel is my CS which goes low before calling the HAL DMA SPI transmit function and goes high during the DMA interrupt (transfer complete).

Wondering if there is a way to shrink/speed up the HAL DMA SPI TX functionality.

Due I need to control the CS line every 24 bits (3 bytes) I cant do the burst for all the data I want to transfer.

#spi #dma #stm32f4

[waclawek.jan]

Posted on November 09, 2017 at 00:51

There's no straighforward hardware support for such framing on the STM32. It could be pulled out using timers but it's far beyond a few clicks in CubeMX or using some prechewed function in Cube.

Using 'libraries' is certainly far from optimal but 5us sounds a wee bit much though - what's the mcu, what is system frequency, and what is the optimization setting?

JW

[Jean Paul Talledo Vilela]

Posted on November 09, 2017 at 02:01

I am using IAR and no optimization. I will enable it. Also system clock is 168 Mhz and I am running SPI at Clock divider by 2 which it is 42 Mhz because SPI main clock runs at 84 Mhz.

I thought using timers but I won't be able to use DMA is there is an active pending transaction right?

[waclawek.jan]

Posted on November 09, 2017 at 09:46

I won't be able to use DMA is there is an active pending transaction

I don't understand.

I'd suggest you to read the RM and experiment, best avoiding Cube/HAL. Much of these experiments can be performed without writing any code, just playing with the registers in the debugger.

JW