GPIO output voltage level in stm32g4

[Tommino]

I want to know the ouput level of the pin PA3 wich has a structure as TT_a (3.6 V tolerant I/O)the table provided in the datasheet is a bit tricky to understand. Which are the row that I should consider for the PA3 pin? Cmos or TTL or the others?

[waclawek.jan]

> Which are the row that I should consider for the PA3 pin? Cmos or TTL or the others?

All of them. They are not contradictory. "CMOS" and "TTL" is there only to make folks sure that it works with CMOS and TTL too.

Note that the third "thick" row is for different load current and the fourth for different VDD.

JW

[Tommino]

Ok @Community member​ thanks for the reply.

I have also read here that all GPIOs are TTL and CMOS compatible. Ok that the third "thick" row is about higher output current.

But what I still do not understand about table 55 is: what is the reason behind being a CMOS or a TTL port for a GPIO configured as an output? (The load currents and Vdd are the same in both conditions).

Must I look at table 55 asking me if the GPIO that I am using is TTL or CMOS? or should I not care about it and consider that every GPIO is compatible with TTL and CMOS logic?

I have seen this similar topic Output port voltage vevel in STM32F4

[waclawek.jan]

> what is the reason behind being a CMOS or a TTL port for a GPIO configured as an output?

The reason is to make users, who don't exactly understand what CMOS or TTL compatibility means, to feel reassured that the output is compatible with both CMOS and TTL.

> should I not care about it

Exactly. It's the current/voltage values which matter here.

JW