gpio let down 5 V pull-up

[dungeonlords789]

I use stm32f401's PB4 (NJTRST) pin. I attached 5 V pull-up resistor (5.1k) to PB4. While MCU is in reset mode the voltage on PB4 is 4.26 V. Only after starting the system, the voltage increases to 5 V. In my program I configure PB4 as input without pull-up or pull-down, just input. I couldn't find an explanation in AN4899.

Why voltage is 4.26 while reset? Is it because of schmitt trigger?

[Michal Dudka]

I gues that pin has during reset some JTAG function (NJRST), after startup is pin reconfigured from to desired mode...

[dungeonlords789]

I use SWD only.

[Michal Dudka · Accepted solution]

It has nothing to do with SWD. Reference manual:

https://www.st.com/resource/en/reference_manual/dm00096844-stm32f401xb-c-and-stm32f401xd-e-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf

at page 148 in section 8.3.1 specify that

"During and just after reset ... PB4: NJTRST in pull-up"

Your pullup and internal JTAG pullup probably creating voltage divider... After startup, your code set pin from AF (JTAG function) to Input and deactivates that pullup.

[TDK]

Just to clarify, "reset mode" means VDD/VDDA is still powered, but NRST is held low?

[Andreas Bolsch]

And this implies that PB4 *MUST NOT* used with an external pullup to 5V. The "5V-tolerant" pins are NOT 5V-tolerant unconditionally: Voltage on pin must not exceed VDD+4.0V and internal pull-up must be disabled. As you can't control the internal pull-up during reset ...

If the internal pull-up is enabled, then as it is connected to VDD, the mcu's supply might be pulled up via the external 5V supply above the allowed 3.6V. This is particulary critical during reset as most parts of the mcu will be inactive drawing almost no supply current. Hence the drop across the internal pull-up will be rather small. If the mcu is never held in reset for extended period of time, you might get away with that, but otherwise ...

Anyway, is there a good reason to connect a pull-up to 5V to PB4 at all? If it is used as input, an (additional) pull-up to VDD will do as well. If it is used as output, note (from AN4899):

"However, a GPIO is five-volt tolerant only in input mode. When the output mode is enabled,

the GPIO is no more five-volt tolerant. For more details about I/O input voltage, refer to V IN

parameters in the general operating conditions table of the datasheet."

[dungeonlords789]

@Andreas Bolsch​ @Michal Dudka​ great thanks. Topic can be closed.