Errata : STM32G DAC use precludes use of associated GPIO pin, even when DAC output disabled.

[JGerb]

I have found something which is unexpected behaviour / errata in the STM32G071's DAC. 

In summary, once the DAC channel is enabled (in this case I'm using CH2) then the pin cannot be used as a normal GPIO output, even if the DAC's output buffer is disabled and its mode is set to 011 or 111 (DAC routed to on chip peripherals with buffer disabled). The manual seems to indicate otherwise, but is unclear. (15.2 says "Each DAC output can be disconnected from the DAC_OUTx output pin").

Test setup as follows : 

STM32G071xRB Nucleo64 board: 

PA5 (the LED pin) set to : 

MODE for PA5 = 0x1 (output)

OTYPER for PA5 = 0 (push/pull)

OSPEEDR = 0 (low speed)

LCKR = 0

AFRL for PA5 set to 0

DAC CH1 and 2 set up : 

DAC->CR EN1 and 2 set, no other bits

DAC->MCR MODE1 and MODE2 set to 0x3 or 0x7 (DAC channel connected to on-chip peripherals with buffer disabled - tested with both 0x3 and 0x7)

I am using Keil and testing the results in the debugger, but observed same behaviour when running normally.

Interestingly, the pull-up on PA5 still functions if the PUPDR is set, thus lighting the LED, however the port output data register does not influence the LED at all until DAC channel 2 is disabled.

If this is not viewed as errata then suggest the manual be updated promptly to make it clear that use of the DAC channel precludes use of the associated pin as GPIO. Can anyone else confirm this errata?

[Antoine Odonne]

​Hello Julian,

In fact disconnecting the buffer don't stop the DAC. DAC output can be driven to the pin buffered or not.

So if you wish to switch DAC off and use the GPIO mode, you must first disable DAC EN bit to '0' and then the GPIO mode configuration takes control of the pad.

However I agree with you this statement in RM seems to be incorrect:

–    ADC, DAC and COMP connection can be enabled in ADC, DAC or COMP registers regardless the configured GPIO mode. When ADC, DAC or COMP uses a GPIO, it is recommended to configure the GPIO in analog mode, through the GPIOx_MODER register.

I think, as long as DAC Enabled (buffer ON or OFF) the GPIO configuration is bypassed and forced to analog mode. Avoiding short circuit consequently.

I am confirming these and come back to you.

Best regards,

Antoine

[JGerb]

In my application I require the DAC channels to drive COMP1 and COMP2 input internally but don't need the DAC output onto any pins. So I do need the DAC enabled, but this means I cannot re-use those pins for anything else. The behaviour of the pin in this mode seems to support what you are saying - the pin behaves as if in analog mode, i was able to pull it up externally easily, or internally with the PUPDR register.

[Antoine Odonne]

​Dear Julian,

The configuration you are looking for is managed by the bit field MODE1 in the DAC_MCR register.

In normal mode:

000: DAC channel1 is connected to external pin with Buffer enabled

001: DAC channel1 is connected to external pin and to on chip peripherals with Buffer enabled

010: DAC channel1 is connected to external pin with Buffer disabled

011: DAC channel1 is connected to on chip peripherals with Buffer disabled

In your case the last configuration.

Thank you and regards,

Antoine

[JGerb]

As mentioned in the original question, I have tried both 011 and 111 MODE configurations in the MCR register (the manual mentions both - probably an error) in my original software, without any difference. So the problem still exists as mentioned above. As the fault can be reproduced easily on your Nucleo board without any modifications, it should be easy to test and confirm my original problem exists.

[Antoine Odonne]

Hello Julian,

Ok, I tested and can reproduce this behavior.

Will try to get back to you rapidly.

Regards,

Antoine​

[Antoine Odonne · Accepted solution]

​Hello Julian,

I confirm the errata and the behavior you observed. It will be added in product errata description. Please notice that in this case, only the Output driver of the GPIO are disabled, Alternate function input (Timer input capture or Salve SPI clock) and Analog input (ADC) as well as standard digital input are however still functional.

Thank you for noticing it and best regards,

Antoine

[JGerb]

Thank you! It's worth noting that the GPIO pullup and pulldown resistors (PUPDR) are also still functional - that can help in some cases.