Does STM32H5 MCU series support MIPI I3C being Target with static address?

[BRIAN_LAI]

I have a EVB NUCLEO-H503RB and tried to implement I3C Target feature.

Before testing on I3C system, I would like to test some basic read write with legacy I2C Controller.

However, I just found that it seems to be not support with static address on I3C Target feature:

Is there any ways to initialization I3C target with a default address to communicate I2C controller?

Or is there any other MCU series could communicate I2C controller with I3C target features?

[Foued_KH]

Hello @BLAI.1​ ,

From RM "An I3C bus is a two-wire, serial single-ended, multidrop bus, intended to improve a legacy I2C bus."

If you want to communicate an I3C target on I3C bus you can assign an address using Dynamic addressing or define a default static address.

There is no way to communicate I2C controller with I3C target features, you can just work on I3C bus to improve the features of the I2C interface preserving some backward compatibility.

For more details, I recommend you check the Application Note : Introduction to I3C for STM32H5 series MCU - Application note

Foued

[BRIAN_LAI]

Thanks for the reply.

There will be no static address when I configure as I3C target on STM32H5 series.

Do we have any other series MCU could initialization with static address as I3C target?

[Foued_KH]

When you configure STM32H5 mcu as I3C target you should assign a dynamic address (when using a sensor as an I3C target you can work with its own address)

But I recommend you try the dynamic addressing and choose your own address for the I3C target and manage your bus .

Foued

[BRIAN_LAI]

Sorry, I'm a bit confused, what do you mean "assign a dynamic address" in your first sentence?

1) Does it means the configuration from Controller "ENTDAA"?

Or the configuration code in Target itself?

2) How to Initialize I3C Target with a specified address by Target itself?

I tried to modify the initialization code based on ST examples :

/**
  * @brief I3C1 Initialization Function
  * @param None
  * @retval None
  */
static void MX_I3C1_Init(void)
{
 
  /* USER CODE BEGIN I3C1_Init 0 */
 
  /* USER CODE END I3C1_Init 0 */
 
  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
 
  LL_RCC_SetI3CClockSource(LL_RCC_I3C1_CLKSOURCE_PCLK1);
 
  /* Peripheral clock enable */
  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I3C1);
 
  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
  /**I3C1 GPIO Configuration
  PB6   ------> I3C1_SCL
  PB7   ------> I3C1_SDA
  */
  GPIO_InitStruct.Pin = LL_GPIO_PIN_6|LL_GPIO_PIN_7;
  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
  GPIO_InitStruct.Alternate = LL_GPIO_AF_3;
  LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
  /* I3C1 interrupt Init */
  NVIC_SetPriority(I3C1_EV_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
  NVIC_EnableIRQ(I3C1_EV_IRQn);
  NVIC_SetPriority(I3C1_ER_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
  NVIC_EnableIRQ(I3C1_ER_IRQn);
 
  /* USER CODE BEGIN I3C1_Init 1 */
 
  /* USER CODE END I3C1_Init 1 */
 
  /** I3C Initialization
  */
  LL_I3C_SetMode(I3C1, LL_I3C_MODE_TARGET);
  LL_I3C_SetAvalTiming(I3C1, 0x000000f8);
 
  /** Configure FIFO
  */
  LL_I3C_SetRxFIFOThreshold(I3C1, LL_I3C_RXFIFO_THRESHOLD_1_4);
  LL_I3C_SetTxFIFOThreshold(I3C1, LL_I3C_TXFIFO_THRESHOLD_1_4);
  LL_I3C_DisableControlFIFO(I3C1);
  LL_I3C_DisableStatusFIFO(I3C1);
 
  /** Configure Target
  */
  LL_I3C_SetDeviceCharacteristics(I3C1, 0xC6);
  LL_I3C_SetMIPIInstanceID(I3C1, DEVICE_ID);
  LL_I3C_DisableControllerRoleReq(I3C1);
  LL_I3C_DisableHotJoin(I3C1);
  LL_I3C_DisableIBI(I3C1);
  LL_I3C_SetDeviceIBIPayload(I3C1, LL_I3C_IBI_NO_ADDITIONAL_DATA);
  LL_I3C_ConfigNbIBIAddData(I3C1, LL_I3C_PAYLOAD_1_BYTE);
  LL_I3C_SetMaxReadLength(I3C1, 0);
  LL_I3C_SetMaxWriteLength(I3C1, 0);
  LL_I3C_SetDeviceCapabilityOnBus(I3C1, LL_I3C_DEVICE_ROLE_AS_TARGET);
  LL_I3C_SetGrpAddrHandoffSupport(I3C1, LL_I3C_HANDOFF_GRP_ADDR_NOT_SUPPORTED);
  LL_I3C_SetDataTurnAroundTime(I3C1, LL_I3C_TURNAROUND_TIME_TSCO_LESS_12NS);
  LL_I3C_SetMiddleByteTurnAround(I3C1, 0);
  LL_I3C_SetDataSpeedLimitation(I3C1, LL_I3C_NO_DATA_SPEED_LIMITATION);
  LL_I3C_SetMaxDataSpeedFormat(I3C1, LL_I3C_GETMXDS_FORMAT_1);
  LL_I3C_SetHandoffActivityState(I3C1, LL_I3C_HANDOFF_ACTIVITY_STATE_0);
  LL_I3C_SetControllerHandoffDelayed(I3C1, LL_I3C_HANDOFF_NOT_DELAYED);
  LL_I3C_SetPendingReadMDB(I3C1, LL_I3C_MDB_NO_PENDING_READ_NOTIFICATION);
 
 
  /**
   * Test for Initialization own address here
    */
  //  LL_I3C_EnableOwnDynAddress(I3C1);
  //  LL_I3C_SetOwnDynamicAddress(I3C1, 0x50);
  //Force enable own address
  I3C1->DEVR0 |= 161;
 
 
  /** Enable the selected I3C peripheral
  */
  LL_I3C_Enable(I3C1);
  /* USER CODE BEGIN I3C1_Init 2 */
  LL_I3C_EnableIT_DAUPD(I3C1);
  LL_I3C_EnableIT_STA(I3C1);
  LL_I3C_EnableIT_GET(I3C1);
  LL_I3C_EnableIT_MWLUPD(I3C1);
  LL_I3C_EnableIT_MRLUPD(I3C1);
  LL_I3C_EnableIT_ERR(I3C1);
 
  /* USER CODE END I3C1_Init 2 */
 
}

But it didn't work, I still need Controller send "ENTDAA" to work with address 7'h50.

3) Reason to have static address on I3C Target

Recently we have some customers trying to upgrade their system with I3C (replacing I2C).

To ensure our components always available on both latest (I3C) and legacy (I2C) systems, we would like to initialize our product with specified I3C Target address before Controller sending any command.

[Foued_KH · Accepted solution]

Hello @BLAI.1​ ,

1) The assignment of the dynamic address is from "Controller ENTDAA" project .

For addressing, an I3C Target Device supports at least one of the Dynamic Address Assignment methods: based on SETDASA, SETAASA, or ENTDAA.

2) You can't set the static address in the Target side for the STM32H5.( if you are working with sensor you can use it's static address for communication )

• Dynamic Addressing while supporting Static Addressing for Legacy I2C Devices

I recommend you follow the step in the AN and you can try with available examples in the CubeFW :STM32Cube_FW_H5_V1.0.1\Projects\NUCLEO-H503RB\Examples\I3C\I3C_Controller_ENTDAA_IT

Foued

[BRIAN_LAI]

Got it, very clear, thank you.