2022-02-04 01:05 PM
In RM0440, it states that "Generation of a single interrupt request for the DMA1 controller," however looking at the exception vectors indicates that there is a separate interrupt vector for each channel for both DMA 1 and 2. Also the stm32cube library header files reflect this.
2022-02-05 11:18 AM
Agreed. the NVIC interrupt vector Table 97 shows eight separate vectors for DMA1 and another eight separate vectors for DMA2.
ST needs to update the document.
2022-06-22 07:26 AM
Hi @Community member ,
I confirm the issue; there is mistake in the RM0440.
The figure below shows the correction to be applied: I reported this issue internally.
Internal ticket number: 130717 (This is an internal tracking number and is not accessible or usable by customers).
Kaouthar
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