Change system clock stm32f0 manual

[hazall]

I want to change system clock as a PLL(using HSE) 20 Minute after systemInit. thats why I must change it in main function not system_stm32f0.c file.

Here is my code, Not working properly. I dint do anything interrupt function.

void ClockInit(void)

{

if ((RCC->CFGR & RCC_CFGR_SWS) == RCC_CFGR_SWS_PLL)

{ 

RCC->CFGR &= (uint32_t) (~RCC_CFGR_SW);

while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) {}

}

RCC->CR &= (uint32_t)(~RCC_CR_PLLON); 

while((RCC->CR & RCC_CR_PLLRDY) != 0) {}

RCC->CFGR &= ~(RCC_CFGR_PLLMULL | RCC_CFGR_PLLSRC);

  RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2 | RCC_CFGR_PLLMUL5);

 //RCC_PLLConfig(RCC_CFGR_PLLSRC_HSI_Div2,RCC_CFGR_PLLMUL5);

RCC->CR |= RCC_CR_PLLON; /* (7) */

while((RCC->CR & RCC_CR_PLLRDY) == 0) {}

RCC->CFGR |= (uint32_t) (RCC_CFGR_SW_PLL);

while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) {}

 SystemCoreClockUpdate();

}

Thanks for everything

[waclawek.jan]

What are exactly the symptoms?

Code looks good. Can't you single-step and observe the registers?

Which STM32? The 'F0 family has two different RCC setup (PLL prescaler).

JW

[Piranha]

Did you adjusted the FLASH latency and APB prescalers properly before increasing the SYSCLK?

[hazall]

STM32F030C8T6TR

I changed code like that, it seems good

void RCC_HSE_Configuration(void){

RCC_DeInit();

RCC_HSEConfig(RCC_HSE_ON);

if(RCC_WaitForHSEStartUp() == SUCCESS){

RCC_HCLKConfig(RCC_SYSCLK_Div1);

RCC_PLLConfig(RCC_PLLSource_PREDIV1, RCC_PLLMul_4);  

RCC_PLLCmd(ENABLE);

while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);

RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

while(RCC_GetSYSCLKSource() != 0x08); 

}

SystemCoreClockUpdate();

}

[hazall]

No, I don't quite understand, can you show an example code?

[Piranha]

Reference manual has an explanation and even exact sequences of actions listed.