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PLLCLK not working for STM32U575ZIT6 based custom board

Agour.1
Associate III

Hi,

I have migrated from STM32L4S5ZI --> STM32U575ZIT6 for one of our custom designed board.

I am trying to configure 96MHz HCLK using Clock configuration in my *.ioc file and just toggle LEDs with a delay of 1 sec with the generated code & this logic.

My observations are as follows:

  1. Board Works (LED toggles perfectly every second) with HSI 16 MHz.
  2. Board works with HSE 48MHZ external oscillator without involving PLL. But I need to change the voltage level to 4 as shown in image attached.
  3. Board does not work with 48MHz MSIS
  4. Board does not work with 96MHz PLLCLK with input as HSE clock
  5. Board does not work with 96MHz PLLCLK with input as HSI clock

for all these cases images are attached. I have also attached my schematics and relevant code snippet and also the project workspace.

Upon survey I found that such issues comes when VDDA & VSSA are not connected / decoupled. Upon probing my board I confirmed both VDDA & VSSA are perfect 3.3V & GND respectively.

Please suggest possible solutions at the earliest.

1 ACCEPTED SOLUTION

Accepted Solutions
Agour.1
Associate III

Today we got the actual solution to the problem.

While creating a new project we need to select Timebase Source as SYSTICK under System core option in .ioc file.

After doing so, I was able to make the clock work properly.

IDE must have thrown an error or warning in this case. I hope this issue will be addressed in upcoming versions of STM32cubeide

View solution in original post

13 REPLIES 13
Piranha
Chief II

The PH1_OSC_OUT pin should be floating. Read the AN4555 and AN5373.

Agour.1
Associate III

hi

Thank you for your reply.

For me, the problem is that PLLCLK is not working with any of the input clock (HSI / HSE). PLLCLK must work with internal HCI if i would have made the wrong connection. I am unable to generate any frequency output out of PLL.

Your solution may help if HSE clock is not working but in my case since I am connecting a external frequency source so this configuration is ok. Only thing is that while configuring RCI I need to select BYPASS CLK. however, as mentioned in my question the HSE clock is working but after tweaking the voltage levels.

Piranha
Chief II

The PH1_OSC_OUT grounded can be OK for HSI/MSI configurations, if the HSE is actually disabled. But for HSE in bypass mode it definitely is not OK! As I said - read the application notes. And why is it so hard to just remove the R131?

Agour.1
Associate III

hi

I have removed R131 but no change.

Anyways please think I am not using HSE,

I just want to provide some 80MHZ using HSI clock source. My real problem is that PLLCLK is not responding.

AScha.3
Chief II
  • set HSE bypass , for ext. oszill.
  • set your voltage scaling-> 2 ( or 1 )
  •  

0693W00000aImhmQAC.png

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Agour.1
Associate III

hi

i have tried changing the voltage scale but it did not help. I am attaching my entire workspace. Please let me know where I am wrong.

AScha.3
Chief II

try .ioc ; (i set it on CubeIDE, was other; just set it on your IDE .

and the path/directory need setting for you again.)

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AScha.3
Chief II

@Agour.1​  and now ?

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Agour.1
Associate III

hi sorry for the delayed response. I got held up with something else so couldn't test. I will update you within a day