2019-10-21 10:50 AM
From the datasheet diagram (attached), it seems like the DMA has access to all of above. However, it is not clear whether it is really possible to DMA data to / from those and how I should do it and I've seen negative response to similar chips, so I am confused. Thank you!
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2019-10-21 02:19 PM
Writing to Flash is VERY slow, and doesn't work well concurrently with reading.
You can use SDRAM as a source/destination, doing random reads/writes to it will be significantly slower than internal SRAM. The processor can cache the SDRAM for its use case, the DMA/Peripherals cannot. There are also coherency issues to consider.
You should benchmark things to understand their speed in the context of your implementation/use case.
2019-10-21 11:50 AM
I won't advise the writing to flash (internal/external) via DMA.
Should be usable as a data source for a pattern buffer, external I would expect would add extra contention
2019-10-21 12:26 PM
Hi. I did not fully understood your answer. Are you suggesting not to write to flash with DMA due to contention in the memory bus? Is it because (while it is possible) DMAing to internal / external FLASH goes through a memory bus that is also shared when the CPU reads and writes the internal SRAM?
Will option (3), which is DMA to SDRAM via FMC not have the contention problem, i.e., the best among those?
2019-10-21 02:19 PM
Writing to Flash is VERY slow, and doesn't work well concurrently with reading.
You can use SDRAM as a source/destination, doing random reads/writes to it will be significantly slower than internal SRAM. The processor can cache the SDRAM for its use case, the DMA/Peripherals cannot. There are also coherency issues to consider.
You should benchmark things to understand their speed in the context of your implementation/use case.
2019-10-23 07:43 PM
Thanks! It seems like STM32F746 series only has a single bank so I cannot run the code simultaneously while R/W to FLASH anyways. I'll try to use SDRAM.