Bug at the beginning of waveform (DMA transfer)

[YSall.1]

Hi I'm trying to generate a signal with 100 ns time on and 100 ns time off thanks to DMA transfer. My problem is that I have a peak of tension before and I don't know what is it (F446RE)

Here is my code:

int main (void)
{
 
 
	/*Clock and Power initialization*/
 
 	rccInit();
 
    /*GPIO initialization*/
 
    gpioInit();
 
    /*External trigger initialization*/
    externalTrigger();
 
	/*Timers initialization*/
 
    timInit();
	/*DMA Initialization*/
	dmaInit((uint32_t)buffer32b,longueurTotale);

GPIO

 
#include "stm32f4xx.h"
#include "gpio.h"
 
#define GPIOAEN		(1U<<0)
#define PIN5		(1U<<5)
#define LED_PIN		PIN5
#define AFR5_TIM	(1U<<20)
 
void gpioInit(void)
{
 
		RCC->AHB1ENR |=GPIOAEN; /* AHB1 clock enable*/
		GPIOA->MODER |=(1U<<11); /*Mode alternate*/
		GPIOA->MODER &=~(1U<<10);/*Mode alternate*/
		GPIOA->PUPDR |=(1U<<10); /*Pull-Up*/
		GPIOA->OSPEEDR|= ((1U<<10)|(1U<<11)); // Very High speed
		GPIOA->AFR[0] |=AFR5_TIM; //Alternate function -> DATASHEET , enabling TIM2 CH1
 
}

Timer

#include "stm32f4xx.h"
#include "tim.h"
 
#define PW1	((1<<6)|(1<<5))
#define Preload1 (1<<3)
#define autoReload (1<<7)
#define TIM2EN		(1U<<0)
#define CR1_CEN		(1U<<0)
#define TIM_DMA_UPDATE	(1U<<8)
#define TIM2_DCR_DBL 0x00000200U // 3 DMA burst transfer and start from ARR register
#define TIM2_DCR_DBA 0x0000000BU
#define Fast (1U<<2)
#define DIER_UIE (1U<<0)
 
 
 
 
void timInit(void)
 
{
 
 
	RCC->APB1ENR |=TIM2EN;
 
	/*Set prescaler value*/
	TIM2->PSC =  0 ;
 
	TIM2->ARR = 0;
 
	TIM2->CCR1= 0;
 
	TIM2->CNT = 0;
 
	TIM1->CR1 &= ~( TIM_CR1_DIR | TIM_CR1_CMS);
 
	TIM1->CCMR1 &= ~TIM_CCMR1_OC1M;
	TIM1->CCMR1 &= ~TIM_CCMR1_CC1S;
 
	TIM2->CCMR1 |= (PW1 | Preload1 |Fast);
 
	TIM2->CR1 |= autoReload;
	TIM2-> DIER|= TIM_DMA_UPDATE;
	//TIM2->DIER |=DIER_UIE;
 
	TIM2->DCR &= ~TIM_DCR_DBA;
	TIM2->DCR &= ~TIM_DCR_DBL;
 
	TIM2-> DCR|=  (TIM2_DCR_DBL | TIM2_DCR_DBA);  // 3 DMA burst transfer and start from ARR register
 
	TIM2-> EGR|= TIM_EGR_UG;
 
	while((TIM2->EGR & TIM_EGR_UG) == SET){}
 
	TIM2->EGR |= TIM_EGR_UG;
 
	TIM2->BDTR|=TIM_BDTR_MOE;
 
	TIM2->CCER |= TIM_CCER_CC1E;
 
	TIM2->CR1 |=CR1_CEN;
 
	//NVIC_EnableIRQ(TIM2_IRQn);
 
 
}

DMA

#include "stm32f4xx.h"
#include "dma.h"
 
#define RCC_AHB1ENR_DMA1_EN 		(1<<21) // Enable clock access to DMA1
#define DMA_PRIORITY_HIGH			((1<<17)|(1<<16)) // Very high priority
#define DMA_CIRCULAR				(1<<8) // Circular mode
#define DMA_MEMORY_TO_PERIPH		(1<<6) // DMA de la mémoire au périph
#define DMA_MINC_ENABLE				(1<<10) //Incrémentation de la zone de mémoire
#define DMA_CHANNEL_3				((1<<26)|(1<<25)) // Selection channel 3
#define DMA_MSIZE					(1<<14) // Les données de mémoire sont de types word 32bits
#define DMA_PSIZE					(1<<12) // Les données périphériques sont de types word 32bits
#define TIM2_DMAR_ADDRESS 			0x4000004C
/*******************  Bit definition for TIM_DMAR register  *******************/
#define TIM_DMAR_DMAB_Pos         (0U)
#define TIM_DMAR_DMAB_Msk         (0xFFFFUL << TIM_DMAR_DMAB_Pos)               /*!< 0x0000FFFF */
#define TIM_DMAR_DMAB             TIM_DMAR_DMAB_Msk                            /*!<DMA register for burst accesses                    */
 
 
void dmaInit(uint32_t src, uint32_t data)
{
 RCC->AHB1ENR |= RCC_AHB1ENR_DMA1_EN; // Enable clock access to DMA1
 
 DMA1_Stream1->CR = 0;
 
 DMA1_Stream1->CR |= (1<<4)|(1<<3)|(1<<2);
 
 DMA1_Stream1->CR |= DMA_MEMORY_TO_PERIPH | DMA_MINC_ENABLE|DMA_CIRCULAR | DMA_PRIORITY_HIGH|DMA_CHANNEL_3|DMA_MSIZE|DMA_PSIZE;
 
 DMA1_Stream1->NDTR = data;
 
 DMA1_Stream1->PAR = (uint32_t)&TIM2->DMAR; // ARR Adress
 
 DMA1_Stream1->M0AR = src;
 
 NVIC_EnableIRQ(DMA1_Stream1_IRQn);
 
 DMA1_Stream1->CR|= (1<<0);
 
 
 // Manque l'autorisation des interruptions?
 
}

[KnarfB]

Debug your code step by step with the scope connected and find which statement causes what behaviour.

Btw, I don't see a reason for using DMA for such a regular waveform, but you might have your reasons.

hth

KnarfB

[YSall.1 · Accepted solution]

I found the problem -> set pin to no pull up no pull down and -> Enable alternate fucntion of pin and timers at the end of all initialisations

 TIM2->CR1 |=CR1_CEN;
 
 
 DMA1_Stream1->CR|= (1<<0);
 
 GPIOA->AFR[0] |=AFR5_TIM;