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ADC Sampling rate understanding

SSudh.12
Associate

I do not understand the difference between the different sampling rates (cycles3 - cycle480). I know it is related to the time given for the ADC capacitor. I also realise that more time should mean more stable reading. I ran some quick tests and I found that, as expected the standard deviation of reading is lower for cycle480 compared to cycle3. However, cycle56 and cycle84 are outliers. cycle56 is much higher while cycle84 is much lower. I had about 4000 readings of each for my tests.

I just wanted to know about this for my understanding.

1 REPLY 1
Danish1
Lead II

A "successive approximation", such as the standard one in the stm32, gives best results if the analog voltage it is trying to convert is a steady voltage.

This is because the way it works is to generate a voltage with a built-in DAC and sees if this voltage is higher or lower than the "input", updating the DAC value at each comparison. A "binary search" is used so only 10 comparisons are needed to get a 10-bit result.

So how does the ADC ensure that the input voltage is steady?

Simple: It doesn't measure the input voltage. Instead it charges up a capacitor as the first stage of the conversion, and then disconnects that capacitor from the input then measures the voltage on the capacitor.

This 3 - 480 cycles is the time allocated to charging the capacitor.

Once fully charged, it takes a further 12 cycles to get a 12 bit result.

So the charging time might be the dominant thing that determines how fast you can take samples.

Why would you want a long time?

If your analog voltage source is fairly high impedance, it takes a long time to charge the capacitor so it accurately reflects the input voltage.

If the impedance is R, the charge time to 1% (i.e. only 7 bits) is 5 C R, where C is the capacitance used to store the voltage.

ST can't make C too small because then it won't hold the voltage sufficiently well.

And you might have a fairly high R because e.g. if you're measuring battery voltage you use a potential divider, and low resistance values will be a large permanent drain on the battery.

Also note that to be able to turn on and off the charging, ST put in an "analog switch" MOSFET that has a certain resistance r which has to be added to your effective impedance R. So it's never useful to charge for less than 3 cycles even if the input is a solid power-supply-rail.

Hope this helps,

Danish