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800 x 800 Display with STM32U5G9VJT6Q - possible?

Ricko
Senior III

Hi,

we are trying to get a 800x800 display to work with the STM32U5G9VJT6Q, using either RGB888 or RGB565 in Video Mode (Burst).

According to what we read it is definitely possible. Did we miss something?

Could someone please confirm that is definitely possible?

Much appreciated

Thank you

10 REPLIES 10
STOne-32
ST Employee

Dear @Ricko ,

 

This application Note may help you with more details : Introduction to LCD-TFT display controller (LTDC) on STM32 MCUs - Application note

The Pixel clock Frequency is key . do you know your target Refresh Rate ?   it is also Key element  for the computation.

Hope it helps you.

STOne-32.

Thank you @STOne-32 

the refresh rate is 60Hz and the pixel clock calculated is 44MHz (values in the attached excel screenshot).

I did read that document a while back and from table 17 on page 31 (screenshot below) it seems to be ok and plenty of headroom (max allowed is 116MHz in the screenshot attached).

When I set the LTDC to 44MHz the CubeMX clock configurator auto-generates a DSI byte clock of 33MHz (264MHz DSI clock lane using 2 lanes). And that also seems well within the STM32U5G9 specs.

All that seems to suggest that I can drive the display specs I mentioned above.

 

Two questions please:

1. Are those calculations correct?

2. Also, whether I set colour to RGB888 or RGB565 (in LTDC and in DSI panels in CubeMX), the auto-calculated DSI byte clock is automatically calculated to 33MHz. Should it not change with the higher RGB (i.e. RGB888)?

 

Thank you :)

 

Ricko_3-1742285702547.png

 

Ricko_0-1742285185887.png

 

STOne-32
ST Employee

Dear @Ricko ,

Your calculation is correct. and indeed Table 17 is the key one - you select your configuration at each Column and to ensure not exceeding the Maximum Pixel clock. for example, for Color Depth 24 bpp using LTDC and DMA2D up to 48MHz.  Regarding STM32CubeMX clock generation, you can force a manual configuration as well, let us know if you need further assistance.

Hope it helps you.

Ciao

STOne-32.

Thank you @STOne-32 

my understanding is that in that scenario around 33MHz for the DSI byte clock is the minimum value. How much faster can I set the DSI byte clock while keeping the pixel clock at 44MHz? Can I push it to the DSI HOST's PHY maximum allowable or do I need to keep it around that 33MHz?

What is the logic/reasoning and pros/cons to decide the upper limit in this specific example?

Thank you :)

 

 

LTDC clock is based on pixels ... 880x840x60 = 44,352MHz , but DSI clock is based on data to send and here seems you miss. For RGB888 video mode simple calc is 800x800x24x60 = 921,6Mbit/s for 2 lanes per lane around 460Mbit plus sync ahead . byte clock is 480Mbit/8 minimum.

Thank you @MM..1 

yes, that is aligned with my original calculations (I was using RGB565 so we get different values).

I understand the DSI minimum clock calculation, but I was wondering if I am correct in thinking that - while keeping the LTDC pixel clock to that 44MHz value - I can set the DSI clock to any value up to the 500MHz maximum value supported by that MCU and that would not cause any synchronization issues?

 

Example: Let's say the DSI minimum clock required to stream the data from the LTDC (just a random number for some random fictional display), then if instead of setting the DSI clock to that 350MHz I set it to 500MHz then the DSI Host - after transmitting a framebuffer - would just sit there idle waiting for the next cycle from the LTDC. And everything would still work perfectly well. Is that correct?

 

Thank you :)

DSIHOST needs to be able to off-load data stream faster, or at least as fast as the LTDC delivers it.

The porches give you some leeway

The display might have it's own timing expectations related to line and frames.

The STM32 can have it's own bandwidth issues, from the frame buffer, the memory behind it, and the contention on it.

Attach a Data Sheet for the specific display

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Thank you @Tesla DeLorean 

please see attached datasheet.

Thank you

JD9365DA-H3 Controller

https://www.buydisplay.com/download/ic/JD9365DA.pdf?srsltid=AfmBOorFv9gpu46PfzoO9RY2ROYK8WLfQzJhFudKRuWjfs21wr5Mkmm9

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Up vote any posts that you find helpful, it shows what's working..