[NUCLEO-N657X0-Q] ETH1 MAC/DMA not receiving packets & Memory Management Tool problems

[damole]

Hello STM32 Community,

I am developing a system on the NUCLEO-N657X0-Q using ThreadX and NetX Duo and I am having a hard time to make the ethernet work. I want to implement a web server in my system but I cannot make the Ethernet communicate.

Problem:
I am unable to receive or transmit any Ethernet frames. The PHY link establishes successfully (from what I see on my linux terminal, autonegotiation completes, Link is UP, and the LEDs on the plug turns on normally), but pinging the Nucleo's static IP yields no response. Wireshark shows no ARP or ICMP packets originating from the Nucleo.

Trying to debug, I see that the the MAC/DMA interrupt `ETH1_IRQHandler` is never triggered by incoming network traffic. It fires exactly twice during the initial board boot sequence(where, for what I understand, some DMA errors flag are raised), but remains completely silent afterward. From the logs that I send to the serial port it appears that from the NetXDuo point of view is everything fine.

The D-cache is disabled and for now I want to keep it disabled, because activating it breaks other parts of my project (I see that in the examples the Dcache is enabled, but I guess is only matters of performance, not mandatory, right?).
Among various attempts, I was also trying to use the Memory Management Tool to move the RAM and FLASH regions in order to assign explicitly regions for the Ethernet descriptors. However, The Tool does not let me move these regions (my project is in XiP mode, if it matters).

I have then some questions about these two related issues:

A) Ethernet and NetX Duo Initialization
1. Am I missing some software initialization step, or misconfiguring the hardware in some way? I went through many examples and I do not find an answer, also given that the configuration sometimes differ among them.

B) Memory Management Tool (XiP Mode)
2. Assuming explicit descriptor placement is necessary for a fix, what is the procedure to unlock, and modify the default memory regions within the STM32CubeMX Memory Management Tool, so that I can define custom memory segments?

Any guidance on resolving the MAC silence or navigating the memory configuration tool would be highly appreciated. Thank you. I attach a .zip file with all the code and the .ioc file.

[STackPointer64]

Hello @damole,

I suggest that you check the examples in the STM32CubeN6 GitHub repository, which may help you with the available configuration, descriptor placement, and necessary code modifications. There is also a web server example for the STM32N6570-DK that you can review:

• NUCLEO-N657X0-Q/Applications/NetXDuo/Nx_TCP_Echo_Server
• STM32N6570-DK/Applications/NetXDuo/Nx_WebServer

Best regards,

[damole]

Hello @STackPointer64,

thanks for the reply. As I mentioned, I already checked these examples and also oters, but my configuration seems consistent to what I found in the examples. I also tried to follow this example, structuring the code in a similar way, but the issue is not solved.

[STackPointer64]

I see. Before going too deep into debugging, have you tried running an example from the repository and testing whether you can ping it? This will help ensure that you do not have any hardware issues. The guide you mentioned might not work on STM32N6 out of the box, because its architecture differs from H7, and the descriptors need to be placed elsewhere.

[damole]

Yes, I am aware that the example is for a different architecture, I actually tried to adapt the example to my board placing the descriptors according to the documentation and the board specific examples.
Thanks

[STackPointer64]

I will analyze the attached project and get back to you.

[damole]

Thank you @STackPointer64, I will wait for your reply. Any insight regarding the Ethernet problem or the MMT would be helpful. 

[STackPointer64]

Hello, 

I’ve noticed some misconfigurations in your project:

1. The names of the memory sections dedicated to the descriptors in the linker file do not match those declared in ethernetif.c. In ethernetif.c, the section names are RxDecripSection and TxDecripSection (without "s"):

ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section(".RxDecripSection"))); /* Ethernet Rx DMA Descriptors */
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".TxDecripSection")));   /* Ethernet Tx DMA Descriptors */

However, in your linker file, the sections are declared as RxDescripSection and TxDescripSection (with an "s"). As a result, the descriptors are not placed in the specified area.

2. In the XSPI2 configuration tab, the Memory Size should be set to 512 MBits and Chip Select High Time Cycle should be set to 2 to match the configuration of the onboard memory chip.

Best regards,

[damole]

Hello @STackPointer64,

Thanks for the hint about the memory configuration.
However, regarding the point 1, I am aware that there is that typo in the code generation and I've already tried to apply the fix that you suggest me (In the attached code above it was present because I regenerated the code without fixing it). I tried again now by setting the names RxDecripSection and TxDecripSection in the linker file so that it will be correct also for further generations.
In any case, I applied these fixes but the ping still does not work, the symptoms are exactly the same as described above.
Could you please revise again the code and check for deeper bugs or misconfigurations? I have been stuck with this problem for a while now, and I checked already many of the common pitfalls.
I found that there is another post (this one), that have received no reply yet, which may have a similar problem to mine, as it is the only one that I found that tries to implement a NetXDuo web server in XiP Mode. Maybe it is a common problem in this setting? I attach the code with the fixes.

Thank you very much.

[damole]

Hello again @STackPointer64,

I report some other information based on what i saw in this post, since it looks like a similar problem.
I included some debug print in the ETH1_IRQHandler in this way:

/**
  * @brief This function handles ETH1 global interrupt.
  */
void ETH1_IRQHandler(void)
{
  /* USER CODE BEGIN ETH1_IRQn 0 */

  uint32_t reg_dma_dsr    = heth1.Instance->DMADSR;
  uint32_t reg_dma_c0rxcr = heth1.Instance->DMA_CH[0].DMACRXCR;
  uint32_t reg_dma_c0sr   = heth1.Instance->DMA_CH[0].DMACSR;
  uint32_t reg_dma_carxdr = heth1.Instance->DMA_CH[0].DMACCARXDR;

  printf("[ETH DEBUG] ETH1_IRQHandler Fired.\r\n");
  printf("[ETH DEBUG] DMADSR      : 0x%08lX\r\n", (unsigned long)reg_dma_dsr);
  printf("[ETH DEBUG] DMACRXCR    : 0x%08lX\r\n", (unsigned long)reg_dma_c0rxcr);
  printf("[ETH DEBUG] DMACSR      : 0x%08lX\r\n", (unsigned long)reg_dma_c0sr);
  printf("[ETH DEBUG] DMACCARXDR  : 0x%08lX\r\n", (unsigned long)reg_dma_carxdr);

  /* USER CODE END ETH1_IRQn 0 */
  HAL_ETH_IRQHandler(&heth1);
  /* USER CODE BEGIN ETH1_IRQn 1 */

  /* USER CODE END ETH1_IRQn 1 */
}

As I mentioned before, it fires exactly twice during initialization and then it never fires again (when sending ICMP or ARP requests or web requests). The logs are:

[ETH DEBUG] ETH1_IRQHandler Fired.
[ETH DEBUG] DMADSR : 0x00000400
[ETH DEBUG] DMACRXCR : 0x00200C01
[ETH DEBUG] DMACSR : 0x00004080
[ETH DEBUG] DMACCARXDR : 0x34100000
[ETH DEBUG] ETH1_IRQHandler Fired.
[ETH DEBUG] DMADSR : 0x00040400
[ETH DEBUG] DMACRXCR : 0x00200C01
[ETH DEBUG] DMACSR : 0x00000000
[ETH DEBUG] DMACCARXDR : 0x34100000

So it seems that also in this case the are in suspended state.
I hope this will help to spot the problem.
Thanks