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using M95P32-I with custom stm32-mw-extmem-mgr

Brenden_PLUS
Senior

I would like to use some of your 

 

The problem is that i don't understand how to use your memory loader with these chips

 

 

The problem is that this library expects the chips to have 4 byte address and just doesn't work with 3 address chips.  If you go through and just change all the call's to 3 byte address in the library i can make a STLDR file to talk to the chip.  Just trying to see if there's a better way. 

 

You have this custom memory section that would help i just don't know how to use it?  So i'm hoping for some help there.

 

3 REPLIES 3
Saket_Om
ST Employee

Hello @Brenden_PLUS 

The better way is not to change the whole loader from 4-byte to 3-byte addressing everywhere. Instead, keep stm32-mw-extmem-ldr as the loader framework and create a small device-specific low-level driver for your EEPROM where the address length = 3 bytes is handled in one place.

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Saket_Om

I'm not sure what your suggesting.

 

I want to use the "stm32-mw-extmem-ldr as the loader framework".  The problem is that it just can't do 4 byte address.  For my program i have support for the chip, since i'm using zephyr. 

 

The problem is i don't have a way to program the board.  ST programmer using STLDR files and the sudgested program to use to make the STLDR for the N6 and H7 is stm32-mw-extmem-ldr.  It works good just not for the smaller parts.  There are custom parts in the repo.  I just don't know how they are used.  In that custom directory they have parts that start off with 3 byte address.  I just don't know how to enable it.  

Khaled_DHIF
ST Employee

Hello @Brenden_PLUS , 

 

You do not need to patch the custom extmem manager globally to force 3-byte addressing as you have noticed. The custom layer already exposes AddressSize, and the normal command path uses EXTMEM_CUSTOM_ADDRESS_24_BITS correctly. For a standard serial page EEPROM, the useful adaptation is to describe the part as a custom EEPROM memory in a dedicated template file under memories folder, keep the access mode in 1S-1S-1S, set the read/write/status opcodes from the datasheet, and let the manager reuse the existing page-write plus WIP/WEL polling path. The only extra change needed is to avoid NOR-flash erase commands, because EEPROM writes do not require sector erase.
 
Kind regards, 
DHIF Khaled
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