LwIP heap memory in DTCMRAM

[iTTy]

Hi there!

I already configured LwIP package and make it work on a NUCLEO-H755ZIQ following @Adam BERLINGER gude in the Knowledge base section:

https://community.st.com/t5/stm32-mcus/how-to-create-project-for-stm32h7-with-ethernet-and-lwip-stack/ta-p/49308 

Well, trying to move the LwIP heap memory to a larger memory location I experienced a n unexpected issue:

When I locate the heap in the DTCMRAM of the M7 core, communication will no more work at all(no ping, no tcp connection...).

Locating it in D1 (AXI RAM) or D3 RAM all work as expected.

I checked also the MPU configurations ad all seems correct, it seems that in DTCMRAM there is a different behavior.

Just for my comprehension, there is something wrong in locating such heap into the DTCMRAM?

Thanks in advance! 

iTTy

[SofLit · Accepted solution]

Hello,

I'm not an ETH expert but seems the heap is used by one of DMA1/DMA2 masters that does not have access to DTCM  RAM.

From RM0399 reference manual:

Same as: https://community.st.com/t5/stm32cubeide-mcus/adc-with-dma-in-scan-mode-is-not-resulting-in-call-to-hal-adc/m-p/660253

EDIT: I forgot to mention the ETH master which also doesn’t have access to the DTCM.

[iTTy]

Intresting!

Just a clarification: in my application project I don't settled up any DMA usage for the ethernet commnunication.

Could be that LwIP package is using DMA in a "hidden" way?

[SofLit]

Several masters such as DMA1, DMA2, ETH (used in your case) etc .. don't have access to DTCM RAM. Look at the table 2 in the RM0399 I've already shared.

I've already edited my previous post.

[LCE]

I confirm SofLit's post, the ETH DMA (neither any other DMA :( ) cannot access DTCM.
I had to place it in D1 AXI SRAM (H7xx).