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LAN8742 Ethernet PHY IC interfacing with STM32h753 evaluation board. ( With ETH_MCO configuration )

Rahul3
Associate

Hello,

We are attempting to implement a ping test on the STM32H753 evaluation board. We need to supply the LAN8742 PHY IC with a clock source via the ETH_MCO pin from the MCU. We've configured the PA8 pin of the MCU to RCC_MCO_1 and set the MCO1 clock to 25 MHz, as shown in Figure 1. This setup should generate a 25 MHz clock signal on the PA8 pin. (Note: We have observed the 25 MHz clock signal on the PA8 pin using a DSO.)

 

Rahul3_0-1717672700667.png

Figure 1: MCO1 clock

ethernet_diagram.png

Figure 2: STM32H7x3I-EVAL RevB Ethernet

 

Rahul3_2-1717673159703.png

Figure 3: Ethernet related jumpers

 

When we set the JP5 jumper to connect pin 1 and pin 2, the LAN8742 PHY IC receives its clock from the 25 MHz quartz crystal, and the ping test works fine.

However, when we move the JP5 jumper to connect pin 2 and pin 3, the LAN8742 PHY IC receives its clock signal from the ETH_MCO pin of the MCU. (Note: The 25 MHz clock signal is observed on the PA8 pin using a DSO.) In this configuration, if ethernet cable is connected to ethernet jack of STM32 evaluation board then MCU continuously receives link up and link down callbacks alternately.

What could be causing this issue?

Thanks in advance.

 

 

 

1 ACCEPTED SOLUTION

Accepted Solutions
ASEHST
ST Employee

Hello @Rahul3 ,

Please ensure that the connector CN15 is disconnected to ensure the proper operation of the MCO1 clock with the LAN8742 PHY on the board. This step is necessary to prevent interference with the clock signal supplied to the PHY.

ASEHST_0-1718354782366.png

With Regards,

If your question is answered, please close this topic by clicking "Accept as Solution".

View solution in original post

2 REPLIES 2
Rahul3
Associate

Has anyone faced this issue?

ASEHST
ST Employee

Hello @Rahul3 ,

Please ensure that the connector CN15 is disconnected to ensure the proper operation of the MCO1 clock with the LAN8742 PHY on the board. This step is necessary to prevent interference with the clock signal supplied to the PHY.

ASEHST_0-1718354782366.png

With Regards,

If your question is answered, please close this topic by clicking "Accept as Solution".