Information about MPU settings for the STM32H743

[forst]

Hello,

I am working on a project for DMA transfer of data from multiple channels of AD in the STM32H745.

Cannot get A/D data. I am having a problem with it

Since the STM32H745 does not have an ADC DMA project, the STM32H743 project is being ported to the STM32H745

I am checking the MPU settings.

The usage of the MPU_InitStruct.SubRegionDisable setting is not understood

The setting is 0x87, what does this mean?

The project that I refer to

STM32CubeH7\Projects\NUCLEO-H743ZI\Examples\ADC\ADC_DMA_Transfer\Src

Best regards

[SofLit · Accepted solution]

Dear @forst​ ,

Indeed, this is new in STM32H7Cube v1.9.1. Was not available in previous versions of STM32CubeH7.

This MPU config was added in order to prevent CM7 speculative access to some memory regions: 

• Speculative instruction fetches can be initiated to any Normal, executable memory address. This can occur regardless of whether the fetched instruction gets executed or, in rare cases, whether the memory address contains any valid program instruction
• Speculative data reads can be initiated to any Normal, read/write, or read-only memory address. In some rare cases, this can occur regardless of whether there is any instruction that causes the data read
• Speculative cache linefills can be initiated to any Cacheable memory address, and in rare cases, regardless of whether there is any instruction that causes the cache linefill

Please refer to this ARM site link for more details.

Now, regarding the MPU config which you are referring to:

 MPU_InitStruct.Enable = MPU_REGION_ENABLE;

 MPU_InitStruct.BaseAddress = 0x00;

 MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;

 MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;

 MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;

 MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;

 MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;

 MPU_InitStruct.Number = MPU_REGION_NUMBER0;

 MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;

 MPU_InitStruct.SubRegionDisable = 0x87;

 MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;

The External RAM memory region is critical, since it is by default Normal memory type and executable and Cortex®-M7 may perform speculative reads to this area, even when there is no memory connected.

The recommendation is to create a safe background region, where the default attributes of the External RAM memory region will be changed (no speculative access allowed).

So, this MPU config makes 4G not accessible except subregions set to 1 in MPU_InitStruct.SubRegionDisable structure member.

.SubRegionDisable means disable current MPU config for subregions set to 1. 

In a given MPU region, there are 8 subregions. So if you divide 4GB (in this case) by 8 you will find 512MB. If you look at memory mapping of default MPU of ARM (4G), you can notice, there are 8 address ranges of 512MB.

There are 4 subregions (of 512M) targeted by this default MPU config in the range: 0x6000 0000 to 0xDFFF FFFF which corresponds to external memories range (FMC, QSPI, OSPI etc ..).

In the above MPU config, each subregion has a size of 512M. MPU_InitStruct.SubRegionDisable = 0x87, will prevent regions in yellow to being set by this config. These regions still in their default MPU config.

SubRegionDisable = 0x87 : 0b1000 0111 --> each bit set to 1 means: don't apply the current MPU config to that subregion.

Hope I answered your question.