Hello everyone,
I’m working on an STM32H747IIT6 based project that uses both Cortex-M7 and Cortex-M4 cores. Under Pinout & Configuration > System Core > Cortex_M7 (and similarly Cortex_M4) in STM32CubeIDE, there are several options such as:
- CPU I-Cache / CPU D-Cache
- MPU (Memory Protection Unit)
- TCM (ITCM / DTCM) Enable
- Background Region Privileged Access
- MPU Instruction Access
- Cache and MPU Region Settings
I’d like to understand the best practices for configuring these settings, especially when running multiple middleware components like FreeRTOS, LwIP (Ethernet), USB, I2C, and an SD card interface. Here are some questions I have:
Cache Enable/Disable: Under which circumstances should I enable both Instruction Cache and Data Cache? What are the typical pitfalls (e.g., DMA conflicts) when D-Cache is enabled?
MPU Configuration: If I plan to use the MPU, how do I decide which memory regions need different cache policies or access permissions? Are there any recommended templates or application notes for setting up MPU regions on the STM32H747?
TCM (ITCM / DTCM): What is the practical approach to using tightly coupled memory on the STM32H7? For instance, should I place time-critical code in ITCM, or should I leave everything in AXI SRAM?
Background Region Privileged Access: What scenarios require enabling this setting, and how does it affect system performance or safety?
DMA Considerations: When using Ethernet, USB, or SD card (all DMA-driven), how should I handle cache maintenance (clean/invalidate) to avoid data corruption or stale data in buffers?
Dual-Core Synchronization: Since I also have a Cortex-M4 core, are there any special considerations for cache/MPU setup that apply to the M4 domain or shared memory regions?
Any guidance, best practices, or references (e.g., ST Application Notes, example projects) would be greatly appreciated. If you have specific example linker scripts, MPU configurations, or sample code that demonstrate these setups, I’d love to check them out.
Thanks in advance for your help!
