Canbus Filter Matching Index

[e-zeki]

Hi,

I'm fairly new to arm platform. I'm trying to communicate between 2 MCU via Canbus.

with the latest HAL Library I set up 4 filters (2 for each fifo) id mask type , 32Bit.

I am receiving my messages from correct fifos. what I cant get is filter matching index.

If I set all my filters to FIFO0 then I get 2x Filter Bank Number(ex: Filter bank number = 4 / Matching index = 8)

But if I set the filters to FIFO1 then I get 0 no matter I do.

I read the refference manual for filtering but I couldn't find any detailed explanation for it

any help on this?

[Tesla DeLorean]

Seem to recall @Community member​ and I having a unhelpful discussion with ST about this issue some years back.

I don't think you can pull the FIFO out of order, so it would be just as efficient to pull the message number once you get the data in a buffer, and dispatch via a singular vector/jump table

[e-zeki]

So if I understand you correctly, this feature has issues by itself.

it works for FIFO0. I get different matching indexes from the filters setted to FIFO0 but I get all the messages from related FIFOs filters does work, only indexes are weird. Also indexes are different from what refference manual says.

[Lukasz Przenioslo]

Hi @e-zeki​ and @Community member​ 

I dont recall exactly what was the case, but after reading your comments the case sounds familiar- the FIFO0 caught all messages and FIFO1 did not catch anything. There was a bug in the HAL lib where FIFO is never set. Since the #define CAN_FIFO0 is equal to 0, and the variable is global, it works. CAN_FIFO1 is 1, so the requirement is never met. I remember I had to set the pRxMsg->FIFONumber variable to CAN_FIFO1 by hand in the interrupt routine.

Something more or less like that, sorry if cannot be of more help. I did not work with CAN peripheral in STM32 for some years.

Too bad this bug is still out there after so much time though...

[rammit]

I'm also currently working with the F7 bxCAN lib. I haven't gotten far enough to see the FIFO1 issue yet, but I think there is some discrepency between the manual and the library in terms of what a filter bank and a filter number is.

The manual says you can have up to 4 filter "numbers" per bank in 16-bit ID list mode.

But the hal_can.c file uses "FilterNumber" when really it is refering to a bank.

   /* Second 16-bit identifier and Second 16-bit mask */

   /* Or Third 16-bit identifier and Fourth 16-bit identifier */

   can_ip->sFilterRegister[sFilterConfig->FilterNumber].FR2 =

      ((0x0000FFFFU & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16U) |

       (0x0000FFFFU & (uint32_t)sFilterConfig->FilterIdHigh);

Sincerely,

Confused

[Lukasz Przenioslo]

Hi,
Yes, I also remember some numbering mismatch...

[e-zeki]

Hi @rammit​ , and @Community member​ FIFO0 and FIFO1 are working now with the latest update. messages drops to the FIFO's according to filter settings.

But as @rammit​ mentioned Filtering section of manual and library are different also both not clear. FIFO0 is returning some filter number based on something unclear in the manual. FIFO1 is not returning anything other than zero. this issue seems to be around here for a long time. They should have fixed it already.

[rammit]

I was using Cube V1.14. Looks like they completely revamped it in v1.15. Looks good. They changed FilterNumber to FilterBank that I mentioned in my last post. @e-zeki​  Are you using 1.15?

[e-zeki]

I'm working on stm32F4 so it says v1.24.0 in Cube Repository. Before that I was using v1.16.0. Its totally different library than previous one. FMI and FIFO assign wasnt working in previous one. FMI still has issues in current one or I couldn't get it right.

[rammit · Accepted solution]

@e-zeki​ I should have mentioned I'm using F7 Cube. I assume the F4 example code is the same because it is the same bxCAN peripheral. Not sure if you fixed your problem yet but I discovered that the latest example code does not handle FIFO1 interrupts, only FIFO0 interrupts (see main.h).

#define CANx_RX_IRQHandler            CAN1_RX0_IRQHandler

which calls:

 HAL_CAN_IRQHandler(&CanHandle);

which "handles" all interrupts by checking IER. That's not right.

But at least there's more useful code to extract now.