Nucleo-H732ZG has strange new ST-Link part

[flyer31]

Why did they use such a strange new design for the ST-Link interface on this Nucleo board?

The "older Nucleo/Discovery" ST-Link-Target connector (6 pin, e. g. CN11 on the Nucleo-LQFP64 boards) is missing.

There is some "strange new mini size MIPI connector there" ... really very ugly with its 1.27mm design ... should this be the new world replacement? And then were is the 2x jumper block to switch between internal and extrenal target connection?

... and somehow the schematics of this Nucleo board is not complete ... if I try to check the SWDIO line in this schematics, it is marked only exactly one time, at the target H723 uC there ... but the other end seems to be missin.... at least Adobe find function does not find it... .

Maybe these STM32H730 / STM23H723 chips have some different new debug interface? (Is it possible to connect to these chips with the older style discovery / nucleo board st-link interfaces?).

PS: Nasty side question: Why do they always place this Ethernet interface on these Nucleo boards? .. I really can not imagine that more than 1% of the Nucleo users would be interested in an Ethernet interface... but it really burns much space on these boards (and also somehow "blocks" many IOs ... as it is always cumbersome to somehow use such internally used IOs for external appications if needed...).

[Andreas Bolsch]

Not really new ... NUCLEO-H743ZI2, -H753ZI, -H745ZI-Q, -H755ZI-Q, -H7A3ZI-Q all have this ST-Link-V3 with that 1.27mm header. Much better than the ST-Link-V2/1, I'd say. That connector sizes shrink ... well, that's life. In electronics, almost everything gets smaller and smaller. mcu in a 144-pin DIP- or PGA-package with 2.54mm spacing? The MC68000's 64-pin DIP was already a pain. The use for external target connection is rather obsolete by appearance of ST-Link-V3mods/mini. Or get yourself a few dozens of ST-Link-V2 clones. Much easier to spend one of these for each and every target rather than constantly fiddling around with jumper wires each time when you switch target. Regarding ethernet: Some pins are not available on the headers, yes. But if you need all pins: A simple LQFP adapter board with a bare mcu soldered on it does its job as well. The caps find enough place on such boards, too, due to the 2.54mm spacing.

[Tesla DeLorean]

Guessing you meant NUCLEO-H723ZG

It has an ST-LINK/V3 implemented in an F723 BGA

Using a 10-pin ARM SWD header (they've had this for years)

[flyer31]

Thank you for answers, yes I mean the Nucleo-H723ZG.

So it is possible to use this Nucleo ST-Link also to connect to some external Target? (through this AMP MIPI connector?) ... if yes, how do you tell the board, that it should use the external interface, or does this somehow run automatically? (it would be nice to get a more clear schematics, as in the current schematics available on STM site the SWDIO line of the processor of the STM32H723 target processor seems not to be connected to anywhere ... but this is impossible I think... .

PS: I just received the Nucleo-G431RB, this also has this new ST-Link on board... 64pin version ... here the schematics is clearer... so as it looks I can use this mini 10p connector for external targets, if I open SB40 and SB41 ... and they are nicely placed at some distnance so that they can be accessed quite easily.. . This then is ok for me.

[Andreas Bolsch]

On the older boards with V2 the debug connector was intended to allow use of the internal ST-Link with an external target (by shorting JP1), and debugging the internal target with an external SWD adapter was not intended. Now it's just the other way round ;)

Unfortunately neither NRST, SWDIO nor SWCLK of the internal target can be easily isolated from the internal ST-Link except by cutting traces. There is however, a simple way do accomplish this without any hardware change, but you won't rather like that: set RDP level 2 of the internal target.

But anyway, as I already said before: No good reason for using the internal ST-Link for an external target.

[flyer31]

Hi Andreas,

thanks for info.

With RDP level do you mean the read protection? What are the drawbacks if I do this?

(usually if I do development with a new controller, I use the internatl target of such a nucleo / discovery board only in the startup to test some examples of STM... . Later then it is very convenient if there is an easy way to switch to my own target... at least I always enjoyed this with your nucleo/discovery boards).

To check the problem with my STM32H730 board now, I would really like to test some simple STM examples on your nucleo target, and then later use the exactly same ST-LINK device for my board... . If I want to be sure that my board has a real problem, I really would like to switch as few as possible ... I do not see a real application to test / debug such a nucleo target with an external debugger, this really seems a bit a weird application to me... .

If I understand your Input concerning the traces correctly, then the error in the Nucleo STM723ZG schematics is the following: On page 3 the signals "SWDIO", "SWCLK" and "NRST" should be named "T_SWDIO", "T_SWCLK" and "T_NRST"? So there are direct traces from these pins to the MIPI10 debug connector?

One further mystery of this schematics is this "level shifter 1V8/3V3" reference on ST-LINK part page 9 ... Why do you need a level shifter there? As I see it, as well the H723 as the F732 part work with 3V3? ok... I somehow understand this now, I found this U10 device ... so you made it like this, that you could supply the Target CPU H723 also with 1V8.

... but if I somehow seem to understand this schematics more cleary, I could unmount these two 22R resistors R11 and R10, if I want to isolate the target from the debug interface ... The NRST even has a normal jumper JP3... .

If I do this (open R10, R11, JP3) - can I then use this board as STLINK-Interface for my test target STM32H730?

[Andreas Bolsch · Accepted solution]

Sheet 2 of MB1364 schematics,, H723ZG, rev. E-01, shows direct connections T_SWDIO-SWDIO, T_SWCLK-SCLK etc., so yes, direct connection.

The level shifters are needed as ST-Link F723 is always supplied by 3.3V, whereas for the H723 jumper JP5 allows selection of 1.8V or 3.3V.

RDP level 2 means *permanent* and *non-reversible* deactivation of JTAG/SWD-interface and internal booloader. Of course, you could install your own bootloader still allowing to program/erase the internal flash (but not option bytes), but that is certainly a rather bad idea for a development system.

There *might* be another possibility, namely holding NJTRST (PB4) active. This should prevent JTAG interface from becoming active. But this

will not prevent the SWD activation sequence being recognized, so this would only allow use of JTAG for an external target, not SWD.

Opening JP3 won't help that much, point is even if the internal target is held in reset state, its JTAG/SWD-interface is still fully operational (that's a feature) and would interfere with the external target.

So except for cutting one of SWDIO and SWCLK traces I don't see any feasible option.

[flyer31]

Thank you, this sounds clear then, I will cut the 2 traces and replace by jumpers, this is fine for me.

[Andreas Bolsch]

Just found a non-intrusive way, not that excellent, but better than nothing: Flash the attached program to the onboard target, then remove jumper 3. This disconnects JTAG/SWD interface from port pins and sets cpu to standby right after power-on reset. Then as long as you don't power-cycle the nucleo board, the internal target will remain completely passive. If you want to use the internal target again, install jumper 3 and do a connect under reset to erase this program.

[Piranha]

Ethernet and USB are on these boards because those two are the most flexible and popular high-speed inter-device connections, with which the board can connect to the "outside world".