LT8722 TEC control with Nucleo U5A5ZJQ

[Metyus]

Hello,

In pair with the LT8722 I use Stm32 Nucleo U5A5ZJQ and TECF1S Peltier device (7v and 1.2A) 

Currently as I am trying to communicate with it through the SPI. Just basic status acquisition packet 32bit transmit and 32bit receive. I send 0xF0001491 and there are three cases.

1. CS pin cycle (high->low->high->low->high) is done twice, one for tx and second for rx, separately. Results in 0x0690XXA5, which indicates acknowledged, but few UVLO alarms that I have no idea how to interpret since, only Vddio and Vin UVLO are explained in datasheet.
2. CS pin cycle (high->low->high) is done. Results in 0x0690XXC3, not acknowledged, same alarms. 
3. CS pin cycle (high->low->high), but with TransmitReceive command, which sends them at the same time. Results in 0x0690XX0F, rejected due to wrong address.

void SPI_Status_Acquisition(uint8_t command, uint8_t register_address)

{

printf(" Status Acquisition Packet \n");

memset(spirx_buffer, 1, sizeof(spirx_buffer));

//Command 8bit -> Address 8bit -> CRC 8bit -> 0xXX ignored 8bit

spitx_buffer[0] = command; // 1 byte for command

spitx_buffer[1] = register_address; // 1 byte for register address

spitx_buffer[2] = 0x00; // 1 byte for CRC

spitx_buffer[3] = 0x91; // 1 byte of padding data

crc = calculate_crc(spitx_buffer, 2);

spitx_buffer[2] = crc;

HAL_Delay(100);

HAL_GPIO_WritePin(TEC_CS_GPIO_Port, TEC_CS_Pin, GPIO_PIN_RESET);

HAL_Delay(100);

HAL_SPI_TransmitReceive(&hspi1, spitx_buffer, spirx_buffer, 4, HAL_MAX_DELAY);

HAL_Delay(100);

HAL_GPIO_WritePin(TEC_CS_GPIO_Port, TEC_CS_Pin, GPIO_PIN_SET);

HAL_Delay(100);

}

Regarding the other SPI packets Data write and Data read, I am lost, because it is 64bit receive and 64bit transmit. How can I send or receive through SPI at once, per one action whole 64 bits? Dividing it into array and sending one-by-one just make it think that every cell is an individual packet.

Thank you.

[SofLit]

Hello @Metyus ,

Please kindly use </> button to paste your code. See this post for posting tips. I'm editing your post.

Thank you for your understanding.

[Andrew Neil]

So this: https://www.analog.com/en/products/lt8722.html 

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@Metyus wrote:

Just basic status acquisition packet

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So this:

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@Metyus wrote:

there are three cases.

1. CS pin cycle (high->low->high->low->high) is done twice...
2. CS pin cycle (high->low->high) is done...
3. CS pin cycle (high->low->high)...

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No, there is only 1 case shown in that diagram:

1. CS goes low
2. 32 bits (4 bytes) are exchanged on MOSI & MISO
3. CS goes high

Have you used an oscilloscope or logic analyser to verify what is actually happening on the wires?

Have you checked out AD's demo software: https://www.analog.com/en/products/lt8722.html#evaluation-kit ?

https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-development-platforms/linduino.html