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I am experiencing failures of the LSE oscillator on STM32F427VIT6 during thermal cycling.

BRieh.1
Associate II

I have an ESC ECS-.327-CDX-1082 32.768KHz crystal on the LSE of an STM32F427.

I have read and followed AN2867.

All of the boards produced so far have had the oscillator come up initially.

All of the boards subjected to thermal cycling (-20°C to +70°C) have failed. (two)

In each case, the voltage on the pins (GPIO PC14 & PC15) measures 0 volts.

I expect somewhere about 0.3V.

I just replaced the MCU on one of the boards and now the oscillator works again.

Any thoughts?

24 REPLIES 24

The crystal you mention, that's the 4pF one right?

Seem to recall the F4 series typically wanted the 6-7pF crystals, although less fussy than the F1 design.

Doesn't have an option to control drive levels.

You might need to try different external load capacitors.

Show your current circuit / topology / component values

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gbm
Lead III

Try to change osc drive strength setting if your MCU has one. Check the PCB layout. There should be no signal PCB tracks going below osc tracks and no ground plane below them. The distance between MCU and crystal should be minimal (like < 10 mm) and the capacitors should be connected to osc tracks between the MCU *** crystal.

My STM32 stuff on github - compact USB device stack and more: https://github.com/gbm-ii/gbmUSBdevice
S.Ma
Principal

How fast is the tranperature transition ? (can be measured regularly by the STM32 through its ADC's VTemp)

BRieh.1
Associate II

Do you really think that incorrect load capacitors would cause a hard failure of the internal LSE circuit?

1.33°C/minute

BRieh.1
Associate II

I have had another hard failure of the STM32F427 LSE oscillator.

This time I used an Abracon ABS06-107-32.768KHZ-T with two 6.8pF load capacitors.

This time around, the thermal plateaus were 0° to 40°C with 1.33°C per minute ramp rate.

Again, Ports PC14 and PC15 meausre 0 volts while I expect about 0.3VDC.

AScha.3
Chief III

this crystal seem good from ds. just your load caps ...i would try 4.7 pF NPO .

and clean area around crystal, caps and cpu. even spurious remains from solder flux can stop this low power clocks. clean again, use compressed air to blow away aceton or isopropanol even under crystal or caps and dry with hot air. then try again.

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BRieh.1
Associate II

4.7pF COG/NPO seems to have worked.

Thank you.

I'll run it through the thermal cycle tomorrow and see if it continues to work.

BRieh.1
Associate II

Differnt day, same result.

After a half-hour cold soak at 0°C , the LSE fails to strart.

Return to ambient and the LSE continues to fail to start.

I've never seen anything like this before.