Good morning community,
I am contacting you to ask for support regarding a EMC immunity problem I'm experiencing.
My application uses an stm32g491cc MCU with an external 8 MHz ceramic resonator (HSE)
What i observe is a reset of the microcontroller during EMC test. The reset appears to be caused by the NMI interrupt generated by the CSS peripheral.
Looking on the oscillator signal with MCO apparently i don't see problem on the HSE oscillator signal (as you can see with the blue line of scope picture), when suddenly the signal is interrupted and after about 4 micro seconds the NMI interrupt intervention and micro reset is observed (yellow line of the image).
Currently i'm not able to understand the cause of this problem and is not clear how the CSS peripheral works becouse in the reference manual is only written:
"Once the CSS is enabled and if the HSE clock fails, the CSS interrupt occurs and a NMI is
automatically generated. The NMI is executed indefinitely unless the CSS interrupt pending
bit is cleared. As a consequence, in the NMI ISR user must clear the CSS interrupt by
setting the CSSC bit in the Clock interrupt clear register (RCC_CICR)."
What is not clear is what means "HSE clock fails" becouse looking the HSE signal with MCO the signal seems good.
The reset is due because in the NMI ISR i have a call for the function NVIC_SystemReset() as a safety operation.