Others: hardware and software

Currently working with M95256. I am doing a single byte write and making the assumption that I do not need to check the WEL bit in the status register, having written the WREN register, before undertaking the write cycle.

Difference between the "Commercial Product" and "Finished Goods" on the ST Micro outer box label

Hi, going through the ST Micro spec (PCN AMS-APD/12/7174),the ST Micro reel label example lists under "Type", there could be two parts numbers with one representing commercial product and the other one representing the finished goods (see below image...

I would like some doubts clarified

I've been working with STM8S chips for about 2-3 months now, and would like my doubts clarified:What is the state of the RAM in the chip after a software/watchdog reset(Not BOR or POR, obviously). I have assumed the RAM is not disturbed by the Reset,...

I have stm8l discovery and Can any one help with i2c configuration here. I am using LP55231 led driver and I do not know whether this configuration is correct.

Please go through the code and help me out in the configuration.void i2c_init(void) {  I2C1_FREQR = 0x20;// 16mHz  I2C1_CCRL = 0x50; // 160  I2C1_OARH = 0x40; // 7-bit addressing and add-mode configuration  I2C1_CR1 = 0x01; // enable peripheral}void ...

STEVAL-ISB044V1 cannot communicate with ST-Link V2

Hi all，I'm using theﾠSTEVAL-ISB044V1 evaluation board for the wireless charging test. The evaluation board is based on STWBC-EP and can be programmed with ST-LINK V2. STM8AF6166 is the core of it, so I post here. I tried to program the board, and the...

M41T62Q6F.Will the configuration of RTC register make the chip enter a state, which makes the chip fail to work normally when the data pin is pulled down? thanks.

Hi I want to buy some of your transistors PD57006. I'm in North Macedonia , and we do not have your resaler. Any way, please give some contact to order this item, from you or some near country. Thank you in advance Sasha Ivanovic

IAR for STM8, FLASH_EraseBlock stuck in release mode

#define RAM_EXECUTION (1) configured with STM8AF52xxUse FLASH_EraseBlock in debug mode to erase normally.In release mode (medium or high optimization) use FLASH_EraseBlock to die.why?

What is it the strange CPU instruction generated by SDCC?

Hello everyone.SLCC generated a strange instruction similar to JRF, represented as .byte 0x21 pseudo-instruction. Can anyone explain what this is? A code snippet is provided in the attachment. The compiler options are as follows: -mstm8 --out-fmt-elf...

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