LIS2DH12 : Not able to communicate with the device when the supply voltage is greater than 2.7V.

[Smalik]

Hi there,

I was working on the LIS2DH12 for one of our applications and found that the LSI2DH12 is not able to work on a supply voltage greater than 2.7V. Is there any condition to operate the device on a voltage greater than 2.7V? In my application, I am operating at 3.3V, but I am not able to communicate with the device at this voltage. And when I drop the voltage level from 3.3 to 2.7V, it works fine.

It would be really appreciable if you could share details to operate the device on 3.3V.

Looking forward to hearing back from you soon.

Warm regards,

Sarthak Malik

[Federica Bossi]

Hi @Smalik ,

There is no special condition to operate the device on a voltage greater than 2.7V, they have been tested up to 3.6V without any problem.

Can you give more details about your setup? Can you share your schematic?

Have you already looked at our specifications at page 13 of the datasheet? Have you something different from our guidelines?

[Smalik]

Hello There,

I have used the datasheet recommended schematic. 

And I also follow the specifications on page 30. I am using the SPI CLK at 2 MHz. Is there any lower limit of clock frequency because, in the datasheet, the max limit is defined that is 10MHz? 

I am also getting some issues in writing the register as you can see in the screenshot of the scope.

In this screenshot i am writing some value in the register. and in the left side you can see the scope this is the MOSI pinThis is the status of MISO pin. In this screenshot i am reading the register which i have written but i am getting different value on reading

[Eleon BORLINI]

Hi @Smalik ,

I remember you 🙂 Those SPI patterns are not so good... is your setup working at any Vdd/VddIO? I suspect there is some issue in the SPI communication (2MHz clk is OK), probably not related to the Vdd level itself.

Last year you shared this picture:

Here it looks you are working in SPI mode 1 (CPOL=0, CPHA=1), but the device works in SPI mode 3 (CPOL=1, CPHA=1), with the clock polarity in idle state at Vdd and the CS line that must switch from high to low state just before stating the clock toggling (16 clock pulses).

By the way, did you ever get a solution from your OLS case #00171355?

-Eleon