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Why does STM32MP257F-DK not having EMI-filters on RX lines for USB 3.0?Can it be like a common standard that the transmitter TX should always have:AC capacitors ESD protection EMI-filteringAnd the RX does not need anything of those, because it’s assuming that their transmitter already having these implemented?This picture is from mb1605-mp257f-c01-schematic.pdf
Hello,We are designing a custom board using the STM32MP157FAC1 device and need to provide one USB 2.0 High-Speed port.Kindly refer to the attached block diagram snapshot and review the proposed USB interface architecture of our custom board.Please verify whether the implementation is correct and let us know if any modifications or additional recommendations are required for reliable USB 2.0 High-Speed operation.Regards,PS
Hi everyone,I'm having trouble bringing up an STM32MP257F-DK Discovery kit (board reference MB1605C). ST-LINK itself works correctly, but I cannot get any communication with the main STM32MP257 processor, and the board never boots. I'd appreciate any insight into what else to check before assuming a hardware fault.Board / setup:STM32MP257F-DK, main board MB1605, revision C-01 Powered via USB-C into CN21 (USB PWR/STLINK) Using the original microSD card that shipped with the kit (preloaded OpenSTLinux demo image) Boot switches set to: BOOT0 = ON, BOOT1 = OFF, BOOT2 = OFF, BOOT3 = OFF (microSD boot)What works:LD11 / power LEDs indicate the board is powered Windows enumerates two "STMicroelectronics STLink Virtual COM Port" devices (COM8, COM9) without issues STM32CubeProgrammer detects the ST-LINK probe: Serial number, FW version V3J15M6B5S1, Board correctly identified as "STM32MP257F-DK", Target voltage reads consistently 3.28-3.29VWhat doesn't work:Connecting via SWD always fails with "
Hello everyone,I designed a board using the STM32MP157 and STPMIC1A. During the initial power-on tests, I noticed that there was no output from the VDD BUCK.The board was tested without any operating system or boot process. Is this normal? This is the first board I’ve designed with the STM32MP1, and if this is normal, I can proceed with porting the OS however, if it’s abnormal, I’ll need to investigate the source of the problem. The board was also successfully detected by the PC in USB boot mode. Regards
Hello,We are designing a custom board using the STM32MP157FAC1 device and interfacing its RGMII interface with the DP83869HMRGZT Ethernet PHY.We have some queries regarding the PCB implementation of the RGMII interface.Is it recommended to use series termination resistors on the RGMII signals? If yes, kindly clarify the following:(1.) Should the series termination resistors be placed only on the TX signals driven by the STM32MP157FAC1?(2.) Are series termination resistors also recommended on the TX signals driven by the DP83869HMRGZT (i.e., the RX signals of the STM32MP157FAC1)?(3.) Kindly advise the recommended resistor values and the preferred placement of these resistors with respect to the driver device.Your guidance on the recommended implementation would be highly appreciated.Regards,Prashant
Hello,We are designing a custom board based on the STM32MP157FAC1 device, which is available in the TFBGA361 package.In the STM32MP157F datasheet (Page 251), the recommended PCB design rules for the TFBGA361 package are provided. Snapshot is attached for your kind reference. However, we are unable to determine the recommended PCB pad size from the information given.Could you please clarify whether the recommended pad size corresponds to Dpad or Dsm, or advise which parameter should be used while designing the PCB footprint?Regards,Prashant
Hello, I intend to use two 8-bit DDR3L memory devices with the STM32MP257FAK3. Could you kindly confirm whether this configuration is supported? Looking forward for your response. Regards,Shubham
Hello Sir/Ma’am,I am planning to interface two 8-bit DDR3L memory devices with the STM32MP257FAK3. Kindly confirm whether this configuration is supported by the STM32MP257FAK3.If supported, I would appreciate your guidance on the recommended implementation approach for this configuration.Thank you for your assistance.Regards,Shubham Kawadkar
I am using STM32MP157C with kernel version 6.6, and the problem I am currently experiencing is that HDMI cannot display. The hardware design uses SII9022ACNU chip, and the driver keeps reporting probe failure with a return value of -11. The SII9022 HDMI chip does not respond to I2C communication on the 6.6 kernel, and manually resetting GPIO is also ineffective. Have you encountered similar problems and how have they been resolved。
Yocto 5.0To build Yocto I follow simple instruction from bootlin bootlin.com/doc/training/yocto/yocto-stm32mp1-labs.pdfBut I get a corrupted Poky distro: 8th partition ("/mnt/part08") is empty (see screenshot below). Why?File "$HOME/stm32mp1_scarthgap/build/tmp/work/stm32mp1-poky-linux-gnueabi/core-image-minimal/1.0/temp/log.do_image_stsplitpartitions.2582911" looks suspicious```NOTE: image_link_name -> "core-image-minimal-stm32mp1.splitted-rootfs"NOTE: image_name -> "core-image-minimal-stm32mp1.splitted-rootfs-20260602150830"du: cannot access '/home/q/stm32mp1_scarthgap/build/tmp/work/stm32mp1-poky-linux-gnueabi/core-image-minimal/1.0/splitted_rootfs/usr/bin/dumpleases'du: cannot access '/home/q/stm32mp1_scarthgap/build/tmp/work/stm32mp1-poky-linux-gnueabi/core-image-minimal/1.0/splitted_rootfs/usr/bin/printf'```My repo to reproduce stm32mp1_scarthgap.Yocto 4.0The same steps I can do with end-of-life Yocto 4.0. And it will works (because 8th partition is not empty, I can see man
Hello Sir/Ma’am,I am planning to use two 8-bit DDR3L memory devices with the STM32MP257FAK3. Could you please confirm whether this configuration is compatible with the STM32MP257FAK3?If it is compatible, I would appreciate your guidance on how to implement this configuration. Regards,Shubham
Hi,I am trying to use SPI3 from the Cortex-M33 on the STM32MP257F-EV1 running OpenSTLinux 6.6 (Scarthgap).Software versionsBoard: STM32MP257F-EV1 OpenSTLinux: 5.0.15 Kernel: 6.6.116 STM32Cube_FW_MP2_V1.3.0 M33 application based on OpenAMP_TTY_echo_CM33What I changedI modified the OP-TEE RIF configuration file: external-dt-v6.0-stm32mp-r3/stm32mp2/a35-td/optee/stm32mp257f-ev1-ca35tdcid-ostl-rif.dtsiI changed SPI3 ownership from CID1 to CID2: RIFPROT(STM32MP25_RIFSC_SPI3_ID, RIF_UNUSED, RIF_UNLOCK, RIF_NSEC, RIF_PRIV, RIF_CID2, RIF_SEM_DIS, RIF_CFEN)I also assigned the SPI3 GPIO pins to CID2:PB7 PB8 PB10using: RIFPROT(... RIF_CID2 ...)Then I rebuilt:OP-TEE FIPand flashed the new images while keeping the original TF-A.VerificationUsing a small RIF access test on the M33, I verified that SPI3 is now accessible.Before: RIF CRC=0 I2C1=0 UART5=0 SPI3=3After modifying the RIF configuration: RIF CRC=0 I2C1=0 UART5=0 SPI3=0So the peripheral owners
Hi,At my company, we develop debuggers and are trying to access STM32MP257F-EV1(ES) board via the DAP,Unfortunately, we are unable to access the DAP and it seems like JTAG (DAP) access is prohibited by hardware.The result was the same even after shorting JP3 and turning off ST-LINK.I have the following questions:Are there any other jumpers positions that have to be changed? Please let me know.Does STM32MP257F-EV1(ES) have debug authentication enabled by default?If so, please let me know if there are any technical documents that explain the procedure for debug authentication.I tried to connect to the on-board debugger by running STM32CubeProgrammer and choosing ST-LINK (SWD), but access was denied.The boot mode that I tried were "UART/USB" and "Development", but both showed the following error:Error: No STM32 target found! If your product embeds Debug Authentication, please perform a discovery using Debug AuthenticationPlease let me know if there is a document or URL that explains how S
Hello,We are designing a custom board using the STM32MP157FAC1 device. For programming and debugging, we are planning to provide an STDC14 connector on our board and use the STLINK-V3SET debugger/programmer.We have the following queries:(1.) Is the STLINK-V3SET suitable for programming and debugging the STM32MP157FAC1 device?(2.) We have connected T_VCP_TX (Virtual COM Port transmit signal) to PG11, which can be configured as UART4_TX, and T_VCP_RX (Virtual COM Port receive signal) to PB2, which can be configured as UART4_RX on the STM32MP157. Kindly confirm whether this connection scheme is correct.(3.) The SWD and Virtual COM UART signals are connected directly from the STDC14 connector to the STM32MP157FAC1 device. Is any ESD protection recommended on these signals? If yes, kindly share the relevant reference.Regards,Prashant Sharma
Hello,I am using a STM32MP257 (Karo SOM), RGMII connected to a DP83869 (100Mbps fiber mode).This is working well until I start the LVDS screen on my board.The screen is powered with 2 regulators : Backlight (16V/360mA, dedicated boost) Logic (2.7V/500mA, dedicated buck)The DP83869 is powered with 3 regulators :1.1V (dedicated buck) 2.5V (dedicated LDO) 3.3V (shared buck also powering the MP2 SOM)Below is the behavior in different configurations:Screen unplugged => fiber link OK Screen plugged => fiber link KO hot-unplugging the screen makes the link working instantly Screen unplugged, flat cable present, with 100ohm R at the end of the LVDS signals => OK Screen unplugged, With no current on the BL / logic DC/DC converter => OK Sinking 300mA on the BL => KO Removing the sink current makes the link working instantly Sinking 300mA on the logic => KO Removing the sink current makes the link working instantly Probing power rails with a scope show clean signals,
I have an STM32mp135f-dk board that I have been using openstlinux-6.1 to develop images on.For my board, I made a custom device tree "iris.dtb" which I intend to use instead of the default "stm32mp135f-dk.dtb".I ran into an interesting issue where u-boot on my board would not load the my modified uboot environment variables.For context, the following is my flash layout file with the u-boot-env at address 0x00904400 #Opt Id Name Type IP Offset Binary - 0x01 fsbl-boot Binary none 0x0 arm-trusted-firmware/tf-a-stm32mp135f-dk-usb.stm32 - 0x03 fip-boot FIP none 0x0 fip/fip-stm32mp135f-dk-optee.bin P 0x04 fsbl1 Binary mmc0 0x00004400 arm-trusted-firmware/tf-a-stm32mp135f-dk-sdcard.stm32 P 0x05 fsbl2 Binary mmc0 0x00044400 arm-trusted-firmware/tf-a-stm32mp135f-dk-sdcard.stm32 P 0x06 metadata1 FWU_MDATA mmc0 0x00084400 arm-trusted-firmware/metadata.bin P 0x07 metadata2 FWU_MDATA mmc0 0x000C4400 arm-trusted-firmware/metadata.bin P 0x08 fip-a FIP mmc0 0x00104400 fip/fip-stm32mp135f-dk
Hi!I wonder why ST have chosen to implement a 10 kOhm pull-up (R34) on the clock line of the SD-card?I have seen this on the STM32MP257F-DK board from ST.Normally, you chould not have a 10 kOhm pull-up on the clock signal, only the other data/command signals.That’s the reason why the EMI filters for the SD-card e.g ST products EMIF06-HMC02F2 and EMIF06-MSD02N16 does not any pull-up onto the clock signal.
Hello,while testing 6 types of SPI NAND with MP257, I found no 1V8 part boots (tested 2, MT29F4G01ABB and AS5F18G04SND). While looking at scope traces, 32MHz clock from BootROM is almost sinusoidal.I tested booting from Engineering mode and custom BL, it boots Linux as 21MHz but not at 32MHz. IOSPEED is set to “2” (tested 3 too).Then I set bit 14 in OTP 124 (allow for <2.5V for VDDIO3) and then set PWR->CR1 VDDIO3VRSEL too. Now, it boots with 32MHz from my BL (with IOSPEED 2) and clock now seems much nicer.But BootROM seems to ignore OTP 124 and tries to use 32MHz with 1V8 and GPIO in degraded mode.Is there way to make 1V8 OSPI boot work ? Force ROM to either use slower clock or to set VDDIO3VRSEL.Thanks, Martin
Hello everyone,We’ve been dealing with a puzzling power management issue on our board (battery-powered design). The PMIC (STPMIC1) intermittently enters an unresponsive state that we believe matches the state described in AN5861. We’ve already implemented the supervisory circuit, but in this case it doesn’t have the desired effect. We're about to enter production, and this issue is our final blocker. We’d appreciate any pointers on how to resolve it. Part number STPMIC1BPQR with the AN5861 supervisory circuit fitted EnvironmentSTM32MP151AAB3 The device is battery-powered; the battery is non-removable. The product is charged via a wireless charger (STWBC86). Schematics Please see parts of our schematics attached. DetailsThe unit appears to experience a brown-out/battery protection event. It seems to happen at very low battery levels. The unit sometimes does not respond to the power button afterwards, which essentially means the device is bricked. Putting the device on the charger does n
Hello I am planning to use STM32mp257Fak3 with DDR3L (16bit and 32 bit saperately),can you suggest some DDR part no and it's sonnection.
Hello,We are designing a custom board using the STM32MP157FAC1 device and need to provide provision for a Serial NOR Flash connected to the QUADSPI interface.We are planning to use Winbond's device W25Q256JVFIQ for this purpose. Kindly confirm whether this device is suitable for use with the STM32MP157FAC1 or if there is any recommended QSPI NOR Flash device that should be preferred with this microprocessor.Regards,Prashant
Hi!My Linux is booting on my custom board. This board is using 2 GB (16-bit density) instead of 4 GB (32-bit density).So, when Linux is booted. I get this.Can it be so CubeMX is only fixed to 4GB when selecting STM32MP257F? Any suggestions? The complete log is attached.I'm using USART6 as debugging tool. flags=600, drv->flags=0, err=-129 Sending event 6/(unknown) to spy 'efi_disk del' Sending event 6/(unknown) to spy 'efi_disk del' eth1_clk_mx-0: When removing: flags=600, drv->flags=0, err=-129 Sending event 6/(unknown) to spy 'efi_disk del' eth1_mdio_mx-0: When removing: flags=600, drv->flags=0, err=-129 Sending event 6/(unknown) to spy 'efi_disk del' eth1_rgmii_mx-0: When removing: flags=600, drv->flags=0, err=-129 Sending event 6/(unknown) to spy 'efi_disk del' sdmmc1_mx-0: When removing: flags=600, drv->flags=0, err=-129 Sending event 6/(unknown) to spy 'efi_disk del' usart6_mx-0: When removing: flags=600, drv->flags=0, err=-129 pinctrl@44240000: When re
Hi there I have a STM32MP257f-DK board running the latest Linux, and I’m trying to output to a waveshare 9.3” HDMI display at its native resolution. 1600x600I can output to it at 1920x1080. and I can output to the display from my Mac at it’s native 1600x600. I see a slight flicker when I try send video then black. then the display goes to sleep. So the display is losing sync.linux reports the output is working, but it seems it’s something to do with the ADZ7xx chip.any ideas?
I’m reading the getting started manual of STM32MP257 (AN5489) and it displays that there are internal pull-ups on CMD and D0, but not CK.Also there is a confusion if the dashed lines means they have internal pull-ups as well.My question is:If CMD, D0, D1, D2 and D3 have internal pull-ups. Why does the STM32MP257F-DK board have external pull-ups?Can I skip these external pull-ups? According to the datasheet of STM32MP257C/F (DS14284 - Rev 5), the CK, CMD and D0 MUST be high at initialisation of the BootROM.
Hello ST Team,I am evaluating the STM32MP215F-DK with the recommended M.2 Wi-Fi/BT module (Embedded Artists EAR00409 / Murata 2EL). I have encountered two critical issues that prevent the Wi-Fi features from working out-of-the-box with the standard Starter Package.I believe these are bugs in the current hardware/software release.1. Critical Software Configuration Issue: SDMMC2 Access Blocked by RIFThe STM32MP215F-DK Data Brief explicitly states that the board features an "M.2 E-Key connector to support Wi-Fi® and Bluetooth® SDIO modules". However, with the default Starter Package (OpenSTLinux 6.6), the Linux kernel fails to probe the Wi-Fi module on SDMMC2.Symptoms:• Linux kernel log shows no response from mmc1 (SDMMC2).• Attempting to access the SDMMC2 registers manually via devmem 0x48230000 results in a Bus Error.• OP-TEE console reports a firewall exception: SERC exception ID: 77 (SDMMC2 Illegal Access).Root Cause Analysis: It appears that the Trusted Firmware-A (TF-A) device tree
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