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Martin Devera
Associate III
June 26, 2026
Solved

STM32MP2 BootROM and 1V8 OSPI NAND

  • June 26, 2026
  • 1 reply
  • 27 views

Hello,

while testing 6 types of SPI NAND with MP257, I found no 1V8 part boots (tested 2, MT29F4G01ABB and AS5F18G04SND). While looking at scope traces, 32MHz clock from BootROM is almost sinusoidal.

I tested booting from Engineering mode and custom BL, it boots Linux as 21MHz but not at 32MHz. IOSPEED is set to “2” (tested 3 too).

Then I set bit 14 in OTP 124 (allow for <2.5V for VDDIO3) and then set PWR->CR1 VDDIO3VRSEL too. Now, it boots with 32MHz from my BL (with IOSPEED 2) and clock now seems much nicer.

But BootROM seems to ignore OTP 124 and tries to use 32MHz with 1V8 and GPIO in degraded mode.

Is there way to make 1V8 OSPI boot work ? Force ROM to either use slower clock or to set VDDIO3VRSEL.

Thanks, Martin

Best answer by PatrickF

Hi ​@Martin Devera 

 

There is no way to change the BootROM behavior, I confirm BootROM use ‘degraded mode’ at 1.8V which limit the IO strength.

Clock signal 32MHz should not be sinusoidal (although not very steep in that config).

Could you please confirm you have the 22 ohms serie resistor on the CLK, close to the STM32MP25 ? It is the only way to have it working.

You should also try limit the load (i.e. PCB traces should be as short as possible).

Did you check about the HOLD signal of the memory (sometimes requires a board pull-up on IO2 or IO3 in order to allow the boot).

 

Regards.

1 reply

PatrickF
PatrickFBest answer
ST Employee
June 26, 2026

Hi ​@Martin Devera 

 

There is no way to change the BootROM behavior, I confirm BootROM use ‘degraded mode’ at 1.8V which limit the IO strength.

Clock signal 32MHz should not be sinusoidal (although not very steep in that config).

Could you please confirm you have the 22 ohms serie resistor on the CLK, close to the STM32MP25 ? It is the only way to have it working.

You should also try limit the load (i.e. PCB traces should be as short as possible).

Did you check about the HOLD signal of the memory (sometimes requires a board pull-up on IO2 or IO3 in order to allow the boot).

 

Regards.

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Martin Devera
Associate III
June 26, 2026

Hi Patrick, thanks for the reply.

I have no 22R but the trace is about 10mm (HDI board). You are right, SI is enough,
incidentally both 1V8 NANDs was also the ones with 4k page. Thus NAND OTP settings
is needed.

Now it boots well.

regards, Martin