STM32 MPUs Products and hardware related

Hello,We are designing a custom board using the STM32MP157FAC1 device (361 balls with 0.5 mm pitch).As per AN5031 (Page 50), laser vias with a 100 µm (~4 mil) drill hole diameter and 250 µm (~10 mil) outer pad diameter are recommended for BGA balls located within the 0.5 mm pitch matrix. A snapshot of the relevant section is attached for the reference.We would like to clarify whether a Via-On-Pad strategy can be used instead of laser vias for the BGA balls within the 0.5 mm pitch matrix of STM32MP157FAC1 device.Specifically, can we use a via of 200 µm (~8 mil) drill hole diameter and 400 µm (~16 mil) outer pad diameter as via-on-pad on the STM32MP157FAC1 BGA pads instead of the recommended laser vias ? Kindly confirm whether this approach is acceptable from the CAD layout perspective and whether it can be used in the CAD layout of our design.Regards,PS  

Hello everyone,When using libcamera on the STM32MP257 platform (ATK-DLMP257B development board with IMX335 sensor), the DCMIPP driver fails to queue stats buffers to /dev/video4, returning -EINVAL. This causes libcamera to crash with an assertion failure during stream shutdown.Additionally, the DCMIPP post-processor (dcmipp_main_postproc) refuses all YUV format configurations (NV12, YU12, YUV420, etc.), returning Invalid argument (22) for each attempt. The hardware only accepts RGB888/RGB565 output formats.When using libcamera on STM32MP257 platform with IMX335 sensor, the DCMIPP driver fails to queue stats buffers to `/dev/video4`, returning `-EINVAL`. This causes libcamera to crash with an assertion failure (`cache_->isEmpty()`) during stream shutdown.Linux kernel version is 6.6.48.libcamera version is v0.3.0+dirty.Steps to ReproduceBasic libcamera capture with fakesinkgst-launch-1.0 -v libcamerasrc ! \ video/x-raw,format=NV12,width=1920,height=1080,framerate=30/1 ! \ fakesi

I am writing this to help.I have just received my EVB STM32MP257F-DK.When I have connected my USB cable in "USB PWR STLNK".LD5 and LD6 were RED,  LD11 was flashing GREEN once.Installed the SD card and nothing, no boot ?Win11 was claiming that the driver is fine and the latest.The USB port were displayed as regular: USB PORT COM9 and COM10.Pressing the RESET button B1 nothing: No BOOT, no bad character on both ports ???Disconnecting the USB cable was well detected by Tera Term but nothing else.I have decided to install STM32CubeProgrammer Winn64 to check ithe ST-LINK by trying to connect.During the installation of the tool, the installer has advised  that it is installing a driver.With no intervention, my EVB started to work, booting LINUX and all the LEDS have started flashing like a chritmasResetting the EVB, we can see Linux booting on  port COM10 115200,8,N1See the image attached when the driver work fine and how it is displayed in Win11 device manager.Have fun.Best regards,SuperGDx

Hello ST team.I am working on the boot chain from qspi NAND flash memory. The board is based on the STM32MP135F SOC and the w25n01gvzeig winbond 128MB IC. The IC is sitting on qspi bank 1 on the default BOOTROM pins (AN5474 p49).I have already succeeded the bootchain for EMMC and USB uboot successfully locates and flashes the nand with the partitions I have specified. But as set the boot pins to 111 I get 0 logs from the serial.By reading in the forum I suspect that the OTP should be programmed with the NAND layout configuration but I would like to be sure. Note the I have build tf-a with the STM32_SPI_NAND=1 on the extra flags and I get a boot log from NAND boot if i perform software reset from uboot usb.With softreset and tfa hardcoded the otp value for nand block nb[7:0]:STM32MP> resetresetting ...▒NOTICE: CPU: STM32MP135F Rev.YNOTICE: Model: STMicroelectronics custom STM32CubeMX board - openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11INFO: Reset reason (0x74):INFO: System

Dear ST Support Team,I am an embedded systems engineer currently designing a custom PCB around the STM32MP257F microprocessor for a product application (a camera-based embedded system). I am using the STM32MP257F-EV1 evaluation board as our reference design for both hardware and software bring-up.We are now finalizing our own DDR memory design and are running into difficulty sourcing a DDR part that is confirmed compatible with the STM32MP257F. We understand the EV1 reference design uses two 16-Gbit DDR4 DRAMs (16-bit wide, populated for a 32-bit total bus), and that the STM32MP257 DDR controller supports DDR3L up to 2133, DDR4 up to 2400, and LPDDR4 up to 2400, in 16-bit or 32-bit configurations. However, when we check current market availability, we are not able to find DDR parts that are clearly qualified or validated against the STM32MP257F DDR controller, and we want to avoid selecting a part that causes signal integrity, timing, or DDR-training issues on our own layout.Could you

The MB1854B camera on the STM32MP257FDK fails to open; clicking the camera icon on the desktop results in a white screen. Is this related to hot-plugging the camera? How can this be resolved? dmesg -w log:stm32-csi 48020000.csi: Timeout waiting for VC0 stopstm32-csi 48020000.csi: Failed to stop stream:0

I am using STM32MP235 on custom board. At some point, I wanted to update the firmware via SFU using STM32CubeProgrammer.I rebooted the board in USB mode (setting the boot mode to BOOT using the pins) and launched CubeProgrammer.TF-A-programmer-usb loaded onto the board normally, but after that, the board stopped responding via DFU.After a power reset, the board boots in DFU mode, even though the internal eMMC contains the old firmware, and the default boot mode is eMMC.As soon as TF-A is loaded onto the board, the board disappears. Nothing is written to the debug port, making it seem as if TF-A failed to boot.I tried using ROMTrace TF-A. The behavior is exactly the same, and no trace is output to the port.Pin PG4 (FAILBOOTN) is connected to a red LED. During normal boot, this LED starts blinking, and after flashing the TF-A (whether via USB or Serial), it turns solid.The documentation says that the FAILBOOTN LED blinks when the board initially boots in USB/UART mode, meaning it doesn't

Does the ST LINK v2 support STM32MP235F connection?

Failed to set local time on STM32MP257.Firstly, I tried to use the commanddate -s "yyyy-mm-dd xx:xx:xx", and system can successfully return the time I set. But when I again use “date” to get the local time, system still return the wrong time in 2024.Then I tried to write into RTC, but still failed.Now because of the failure of time setting, all the apt command are unavailable.So I want to know how to correctly change the local time and RTC time, or to find an alternate way to apt-get package.Thank you.

I am currently using the distribution version: V5?rt 6.1.82-rt patch?stm32mp257 I am using the TSN mode of the STM32MP257 switch and found that once I set the date, it reverts to the time before the setting after a period of time, and also causes a probabilistic hang during shutdown or reboot. After investigation,this is caused by the deptp service being enabled in the TSN service. My current application only uses the switch mode and does not require TSN. Is it appropriate to disable deptp? What other services can be disabled to enhance system stability?  

I would like to gather information on the following points. Kindly guide me on these aspects:Identify the CMOS image sensors supported by the STM32MP255F and STM32MP257F. Determine whether the VB66GY and VB16GZ sensors are compatible with the STM32MP255F and STM32MP257F, including the required driver-level integration and software support.

Hi:Does I have STM32MP257F-EV1 board and another board can generate BT.656 video source without I2c setting.I want to use DCMIPP parallel interface to get the image. I modify the device tree in stm32mp257f-ev1.dts/ {... clocks { cec_clock: cec-clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <12000000>; }; dummy_cam_clk: dummy-cam-clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <54000000>; }; pad_clk: pad-clk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <100000000>; }; };...};&dcmipp { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&dcmipp_parallel_pins_a>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dcmipp_parallel_in: endpoint { remote-endpoint = <&dummy_camera_out>; bus-type = <6>; bus-width = <8>; pclk-sample = <0>; }; }; };};&

Hello Team, On the Development Board, pin PN12 is used to detect whether an SD card is inserted or not; however, it is also required by xspm_p2_ncs, so I don’t think we can simultaneously use XSPIM1, XSPIM2, and PN12. Is there any other pin you would recommend for the purpose of detecting an SD card? Also, I am using the mechanical switch to detect the SD card. In the Datasheet, SDMMC1 is specified for the SD card However, in the AN5967 Document, SDMMC2 is preferred for the SD card. Which port, SDMMC1 OR SDMMC2, is preferred for a microSD card? Thanking you 

Hi All!I have successfully run ptp4l as a GM role on the 157d-dk1 kit, using NMEA+GPS in as a reference time. I have a specific setup, where NTP is actually disciplining the system clock and the PHC clock is driven from the CLOCK_REALTIME using phc2sys.I wanted to test the PPS output generation on the PG8 pin, so that I can compare incoming PPS with generated PPS, but I can’t make it work.The board version is C03 (no missing solderbridge), Yocto is Kirkstone (kernel 5.15), ptp4l 3.1.1.I have added PG,8,AF11 to kernel’s device tree (in separate inc file):    ethernet0_rgmii_pins_a: ethernet0-rgmii-0 {        pins4 {                pinmux = <STM32_PINMUX('G', 8, AF11)>; /*PPS OUT*/        };   }; Now I can see in gpioinfo output that it is used by kernel but still set as input.Then tried setting period for the PPS through ptp0 (tried different settings):echo “0 0 0 1 0” > /sys/class/ptp/ptp0/period The “clk_summary” shows and in general ptp4l works:          ethptp_k           

HiI designed a PCB with an STM32MP157 using a Micron LPDDR3 memory. When I started the layout, I was advised that the memory would be available at least until 2029, so proceeded in good faith. When I came to order prototype samples back in March, I found that there was a Last Time Buy of August 31st this year.The only option that I had was to change the layout to support DDR3L memory, however with the current DRAM supply crisis, I do not have confidence that this generation of device will have sufficient longevity of supply to justify the investment in mass production.My alternative is to jump to an STM32MP2-based board and use DDR4 or LPDDR4 memory which will likely be available for longer but again with the current supply chain situation, these generations could also be obsoleted sooner than anticipated. I already read of DDR5 and LPDDR6 memories coming on stream.Two questions:With regard to the STM32MP1 and STM32MP2 processors, what is ST’s best guidance about which DRAM memory type

Hi, I am trying to design a custom board with a 1 rank dual die 16Gb LPDDR4, AS4C1G16MD4V-046BIN. I have read the design guide AN5489 and DDR config AN5723. From my understanding there is only one chip select pin for each rank, correct? What do I do? Is there a configuration supported by the STM32MP2x processor with 2 chip select in 1 rank?FYI, I am designing a board based on STM32MP235, so supposedly only 1 rank is usable as per the datasheet.

Hi team ST,As we all know, the major DRAM manufacturers have all announced they will stop fabricating the DDR4 die and only LPDDR4 is still in production, in light of this, does STMicroelectronics has an plan to design a new PMIC more focus on the LPDDR4 configuration with less LDOs and smaller package? Given that we don’t need the external termination for DDR anymore with LP DRAM.

OpenSTLinux: Starter Package, plain image (FlashLayout_sdcard_stm32mp257f-dk-optee.tsv), version 5.0.17-openstlinux-6.6-yocto-scarthgap-mpu-v26.06.10M33 firmware: Zephyr RTOS (4.4.99), board target stm32mp257f_dk/stm32mp257fxx/m33, loaded and started from Linux via remoteproc.Goal: Drive a SPI device (Qorvo DW3000) from the Cortex-M33 over SPI6, which is exposed on the CN5 header (GPIO10/SPI6_MOSI = PC7, GPIO9/SPI6_MISO = PC4, GPIO11/SPI6_SCK = PF7).When the M33 firmware performs a SPI transfer, the GPIO chip-select line toggles correctly (verified on a logic analyzer), but SCK never produces any clock pulses & the line stays flat. Consequently no data is exchanged (MOSI/MISO flat). The transfer call itself returns; it just produces no clock.What I have already checked:-RIFSC firewall: SPI6 shows as NSEC, NPRIV, CID filtering disabled (from the RIFSC debug dump) — i.e. not blocked/assigned exclusively to the A35.-Clocks: clk_summary shows both ck_icn_p_spi6 (~200 MHz) and ck_ker_sp

Hello,I'm working with an STM32MP257 and encountering unexpected behavior regarding RTC resource isolation between the Cortex-M33 (bare metal/HAL) and Cortex-A35 (OpenSTLinux).I performed a simple test where my Cortex-M33 requests the initialization resource using the Resource Manager and holds it while reading the time registers:ResMgr_Status_t st = ResMgr_Request(RESMGR_RESOURCE_RIF_RTC, RESMGR_RTC_INIT_RSC);if (st == RESMGR_STATUS_ACCESS_OK){// Reading registers directly while holding the lockuint32_t tr = RTC->TR; uint32_t dr = RTC->DR;// ... intentionally omitting ResMgr_Release to test the lock ...} While the M33 is actively holding this RESMGR_RTC_INIT_RSC lock, I execute the following command from the Linux shell on the A35 core:hwclock --set --date="2026-07-18 12:34:56" --utcTo my surprise, the time is successfully changed.My question is: why does this happen? Does the OpenSTLinux RTC driver (rtc-stm32.c) completely bypass the RIF synchronization mechanism and force its

I have a working RLT8211F at my STM32MP257F board.I wonder why only the hardware reset is working PYRSTB (pin 12), but the software reset won't work?Should they not do the exactly the same thing?My Ethernet PHY is working, but it seems it requires as hardware reset GPIO from the MPU.I have tried to modify the code in realtek.c and phy_device.c by adding the function genphy_soft_reset to the struct in realtek.c. }, {  PHY_ID_MATCH_EXACT(0x001cc916),  .name = "RTL8211F Gigabit Ethernet",  .probe = rtl8211f_probe,                .soft_reset = genphy_soft_reset, /* <------- this */  .config_init = &rtl8211f_config_init,  .read_status = rtlgen_read_status,  .config_intr = &rtl8211f_config_intr,  .handle_interrupt = rtl8211f_handle_interrupt,  .set_wol = rtl8211f_set_wol,  .get_wol = rtl8211f_get_wol,  .suspend = rtl8211f_suspend,  .resume = rtl8211f_resume,  .read_page = rtl821x_read_page,  .write_page = rtl821x_write_page,  .flags = PHY_ALWAYS_CALL_SUSPEND,  .led_hw_is_supported

Hello,We are designing a custom board using the STM32MP157FAC1 and have used the STPMIC1APQR PMIC to power the microprocessor, similar to the STM32MP157F-DK2 evaluation board.We need to provide a Power LED on the front panel of the card to indicate that all the power rails generated by the STPMIC1APQR are operating correctly.Since the STPMIC1APQR does not provide a dedicated Power_Good (PGOOD) output signal, we are considering using the RSTn pin (Pin 1) to drive the Power LED along with its connection with NRST pin of STM32MP157FAC1. Our understanding is that RSTn is released (driven high) only after the power-up sequence has completed successfully and all required power rails are within specification. If any monitored power rail fails, RSTn would be asserted low.We plan to use a transistor stage to drive the LED from the **RSTn** signal so that:(1.) RSTn = High: Power LED ON(2.) RSTn = Low: Power LED OFFCould you please confirm whether this is approach is okay or not ? If not, kindly

I  have already submitted the case in ST Online Support, but have had no reply for over two weeks.

Hello,I’m using an Karo SOM module (MP257) on a custom board with SFP module.The SFP module is powered with the main 3.3V regulator. It has a TX_DISABLE input (0=ON, 1=OFF). This input :Is TTL Has an internal pull-up R (around 10k) Has an external pull-down R (10k) In connected to PE2This makes a voltage divider : without driving the TX_DISABLE line, the voltage is something like 3.3V / 2 (1.8V to be precise)Some simple tests to confirm that :SFP module unplugged => voltage is driven only by the pull down R => 0V A source meter on the TX_DISABLE confirms the presence and value of the internal RPU. Now let’s play with the MP2. Is this processor able to blink a led ? Don’t laugh, nothing could be further from the truth. After linux boot : gpioinfo shows PE2 is input. It should logically be driven by the driver, but for an obscure reason, this is not the case. At least we can do things manually… Set it to 0 ?gpioset -b disabled -d push-pull PE2=0=> Voltage is still 1.8V Ok, bad.

Hello,In the reference schematic of the STM32MP157F-DK2, the HSE clock is generated using the NDK NZ2016SH 24 MHz END4869F oscillator. However, this part is not readily available, and we are therefore looking for a suitable alternative.Could you please confirm whether the Abracon’s part ASE-24.000MHZ-LR-T can be used as a replacement to provide the HSE clock for the STM32MP157FAC1 device ? If this part is not recommended, kindly suggest a suitable alternative that is compatible with the STM32MP157FAC1.Regards

Hello,We are designing a custom board using the STM32MP157FAC1 device. In our design, we are not using the DSI interface or the ADC peripheral.We would like your guidance on the recommended handling of the corresponding unused pins.(1.) DSI Interface:Since the DSI interface is not used, how should the following differential signals be terminated ?(a.) DSI_CKP / DSI_CKN(b.) DSI_D0P / DSI_D0N(c.) DSI_D1P / DSI_D1N(2.) Analog Inputs:As the ADC is not being used, what is the recommended way to connect or terminate the ANA0 and ANA1 pins ?Could you please advise the recommended hardware implementation for these unused pins?Regards,