STM32MP2x PMIC roadmap

[ToTom818]

Hi team ST,

As we all know, the major DRAM manufacturers have all announced they will stop fabricating the DDR4 die and only LPDDR4 is still in production, in light of this, does STMicroelectronics has an plan to design a new PMIC more focus on the LPDDR4 configuration with less LDOs and smaller package? Given that we don’t need the external termination for DDR anymore with LP DRAM.

[Windows]

Hi ​@ToTom818 

Which pins of STPMIC25 are you talking about?

[ToTom818]

termination, Vpp, Vref.
As LPDDR4 eliminated the use of these voltages, the LDOs for these power rail are no longer required. With regards to which exact pins you need to know, there is no exact pin. More or less this is about removing unecessary ondie elements and therefore shrinking the PMIC size.

[Windows]

termination, Vpp, Vref.
As LPDDR4 eliminated the use of these voltages, the LDOs for these power rail are no longer required. With regards to which exact pins you need to know, there is no exact pin. More or less this is about removing unecessary ondie elements and therefore shrinking the PMIC size.

​@ToTom818 

 

ST made support for legacy EOF DDR.

That's the reason.

[PatrickF]

Hi ​@ToTom818 ,
there is an STPMIC2L, focus for STM32MP21, but maybe usable for STPMIC25 with some constrains (e.g. no GPU, limited power, etc...)
https://www.st.com/en/power-management/stpmic2l.html

Regards.