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Associate III
August 12, 2026
Solved

PPS OUT signal (again) on stm32mp157d-dk1

  • August 12, 2026
  • 1 reply
  • 18 views

Hi All!

I have successfully run ptp4l as a GM role on the 157d-dk1 kit, using NMEA+GPS in as a reference time. I have a specific setup, where NTP is actually disciplining the system clock and the PHC clock is driven from the CLOCK_REALTIME using phc2sys.

I wanted to test the PPS output generation on the PG8 pin, so that I can compare incoming PPS with generated PPS, but I can’t make it work.

The board version is C03 (no missing solderbridge), Yocto is Kirkstone (kernel 5.15), ptp4l 3.1.1.

I have added PG,8,AF11 to kernel’s device tree (in separate inc file):

    ethernet0_rgmii_pins_a: ethernet0-rgmii-0 {
        pins4 {
                pinmux = <STM32_PINMUX('G', 8, AF11)>; /*PPS OUT*/
        };
   };

 

Now I can see in gpioinfo output that it is used by kernel but still set as input.

Then tried setting period for the PPS through ptp0 (tried different settings):

echo “0 0 0 1 0” > /sys/class/ptp/ptp0/period

 

The “clk_summary” shows and in general ptp4l works:

          ethptp_k                    1        1        0    99000000          0     0  50000         Y

 

I also switched roles between client&server, that is - disabled NTP, run ptp4l as client, phc2sys driving CLOCK_REALTIME from the /dev/ptp0 and set some fake ptp server on my ubuntu machine. Still no PPS on PG8 output.

I’m kind of lost - I have seen some comments from people successful with this, but it doesn’t work for me - what else I could check?

EDIT: I also checked  

/sys/kernel/debug/stmmaceth/eth0/dma_cap

that it states: “Number of PPS Outputs: 1” which would reflect probably the “periodic outputs” value.

 

thanks

Oskar

Best answer by OskarM

As usual, I found it myself after a good sleep: I had M4 firmware with usart3 pins taking over the PG8 pin, as this was just some old test firmware.

For reference, although I had this already sorted, the dk1 default DTS settings for usart3 are using the usart3_pins_c and have option “has-rts-cts” enabled. One needs to change it to usart3_pins_a and disable “has-rts-cts” in device tree.

b.r.

Oskar

 

 

1 reply

OskarMAuthorBest answer
Associate III
August 13, 2026

As usual, I found it myself after a good sleep: I had M4 firmware with usart3 pins taking over the PG8 pin, as this was just some old test firmware.

For reference, although I had this already sorted, the dk1 default DTS settings for usart3 are using the usart3_pins_c and have option “has-rts-cts” enabled. One needs to change it to usart3_pins_a and disable “has-rts-cts” in device tree.

b.r.

Oskar