STM32 MPUs

Hi everyone,we applied the ST FWU reference solution on our own platform based on the STM32MP157F.The solution was taken and adapted from the ST Yocto layer meta-st-ota (https://github.com/PRG-MPU-CUST/meta-st-ota). SummaryWhen performing consecutive updates using the ST FWU reference implementation (TF-A FWU metadata + RAUC + post-install.sh + rauc-mark-good.service), the FWU rollback boot counter keeps decreasing across successful updates. Expectation: after each successful boot of a newly updated bank (and rauc-mark-good.service finishing successfully), the FWU boot counter should be reset to the initial value (4 in this setup).Actual: the FWU boot counter is decremented (4 → 3 → 2) with each update cycle, even though the system was marked good. This suggests that the rollback counter is not being reset by the rauc-mark-good integration in the ST FWU reference solution.(full log is attached, including metadata content printed in hexa after each step) Reproduction

Hi,I am working with the STM32MP135F-DK board and built an SD card image using Yocto Scarthgap (openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06).The image boots successfully. To prevent the Year 2038 (Y2038) problem, I confirmed that require conf/distro/include/time64.inc is already included and processed in the distro configuration.To test Y2038 compliance, I manually set the system time to the year 2040.The time was set successfully, and verifying it via the date command showed the correct time (2040).Checking the RTC using hwclock --show --verbose also returned the correct time in 2040.NTP is explicitly disabled via timedatectl set-ntp false, so network time synchronization is not causing any interference.The Problem:The issue occurs upon a reboot. After the system reboots, the time rolls back to the year 2024.My Analysis:Upon looking into the Linux kernel source (drivers/rtc/class.c), it appears that the kernel clamps or prevents system time overflow. This seems to be a fallback mech

Hello,I am working on the STM32MP257F-DK board and would like to use two Ethernet interfaces simultaneously for industrial network communication.The board provides:One onboard RJ45 Ethernet connector. One USB Type-C connector that, according to the documentation, can also provide Ethernet connectivity.My objective is to establish a network ring topology, where both Ethernet interfaces are connected to external devices using RJ45 Ethernet cables.I would like to understand:How can the USB Type-C Ethernet interface be converted to a standard RJ45 Ethernet connection? Does the USB Type-C port support Ethernet through a USB-to-Ethernet adapter (USB Ethernet dongle)? If yes, are there any ST-recommended USB-to-RJ45 adapters that have been validated with STM32MP257F-DK? Under Linux/OpenSTLinux, will the onboard RJ45 and the USB Ethernet adapter appear as two independent network interfaces (for example eth0 and eth1)? Has anyone implemented Ethernet ring topologies such as MRP, RSTP, PRP, or c

Hello Support Team,I am trying to start SWD debugging for the STM32MP135DAF7 in STM32CubeIDE using an ST-LINK V2 probe, but I cannot get the debugger to work correctly.My development board is MYD-YF135-256N256D-100-I based on STM32MP135DAF7.I enabled Engineering boot mode (B2 = 1, B1 = 0, B0 = 0)Software versions:STM32CubeMX v6.17.0STM32CubeIDE v2.1.1STM32CubeMP13 Firmware Package V1.2.0Debugger:Original ST-LINK V2Serial number: 30FF6F064E58373521xxxx43Firmware version: V2J47S7I created a simple project in STM32CubeMX and enabled only RCC and SWD debug. Then I opened the project in STM32CubeIDE and configured debugging through OpenOCD with “Connect under reset”.The debugger can detect the target correctly:SWD DPIDR is detectedCPU examination succeedsThe core sometimes halts correctlyBut after that, the debug session fails with many OpenOCD errors such as:timeout waiting for DSCR bit changeError waiting for InstrCompl=1Error waiting for cortex_a_exec_opcodeFail reading CT

Can the clkout clock on the PHY chip be disabled, and how is it configured?

On the STM32MP135F-DK, is the 4.3" LCD module physically removable? Or is CN16 accessible without removing the LCD?

Hello ST community,I’m an embedded software beginner working with the STM32MP257-DK board and OpenSTLinux (Yocto). I need help getting USART6 working on the external GPIO connector (PF13 = TX, PF14 = RX — CN5 pins). I have rebuilt device trees and copied DTBs to the board, but the USART6 device never appears in the running system (/dev/ttySTM6), and at one point my Ethernet/SSH stopped working after applying a DTB change.I will be blunt: I have spent many hours following suggestions, debugging, and fixing syntax errors in DTS files. I may be missing one critical detail about how ST maps peripherals on the DK board or about kernel bindings. I have documented exactly what I tried and the exact outputs — please read fully before replying. I am a beginner; please do not assume I know advanced DT or U-Boot internals.Environment / versionsBoard: STMicroelectronics STM32MP257F-DK (discovery/“DK” board)Host SDK: SDK-x86_64-stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11Kernel source / s

hi team,I'm facing issue in enabling usart6 of the expansion connector of stm32mp257f-ev1, All i did was to enable the &usart6 via DT overlay, even tried disabling dmas, but no luck.I have attached the kernel log and also attached the RIFSC debug log FYRHoping for a quick reply, thanks in advance./dts-v1/; /plugin/; / { compatible = "st,stm32mp257f-ev1"; fragment@0 { target = <&usart6>; __overlay__ { status = "okay"; }; }; };$ stty -F /dev/ttySTM1 115200 E/TC:0 stm32_serc_handle_ilac:133 SERC exceptions [63:32]: 0x10 E/TC:0 stm32_serc_handle_ilac:139 SERC exception ID: 36 [ 39.106314] SError Interrupt on CPU0, code 0x00000000bf000002 -- SError [ 39.106336] CPU: 0 PID: 1618 Comm: stty Tainted: G O 6.6.78 #1 [ 39.106344] Hardware name: STMicroelectronics STM32MP257F-EV1 Evaluation Board (DT) [ 39.106348] pstate: 80000005 (Nzcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 39.106357] pc : stm32_usart_rx_dma_start_or_resume+0x80/0x234 [ 39.106375] lr : stm32_usart

I ported PPSSPP 1.20.3 to run on the STM32MP257D platform.With the GLES backend, everything looks fine and normal games run without issues. But when I try heavier 3D games like Tekken 6, it gets extremely choppy – single-core CPU usage stays around 95%.Then I tried switching to Vulkan. At first, the emulator crashed on startup. I debugged it by adding some print statements and found that a function call was returning an incorrect value – which shouldn't happen according to the Vulkan spec. Because of that, another function (vkCreateSwapchainKHR) ended up failing. 1) PPSSPP Crash Log:Spoiler (Highlight to read)08:00:074 Vulkan/VulkanContext.cpp:1416 I[G3D]: surfCapabilities_.current: 960x544 min: 1x1 max: -1x-1 computed: -1x-1 08:00:079 Vulkan/VulkanContext.cpp:1579 E[G3D]: vkCreateSwapchainKHR failed! VK_ERROR_DEVICE_LOST08:00:074 Vulkan/VulkanContext.cpp:1416 I[G3D]: surfCapabilities_.current: 960x544 min: 1x1 max: -1x-1 computed: -1x-1 08:00:079 Vulkan/VulkanConte

Hello,I'm working with the STM32MP135F-DK kit and I'm trying to understand the correct way to configure interrupt lines (IRQs) for external devices,  specifically for the STPMIC1 in OP-TEE.I have been reading the official documentation and I'm a bit confused about whether it is mandatory to use the dedicated PWR Wake-up pins (WKUP1–WKUP6) for interrupt lines, or if any GPIO can be used.--- What I observed in the reference DTS files: Looking at the OP-TEE device tree (core/arch/arm/dts/stm32mp135f-dk.dts, tag 4.0.0-stm32mp), I can see that all IRQ consumers use EXTI lines above 55: - STPMIC1 interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING> (WKUP1 / PF8) --- My questionsIs it mandatory to use one of the 6 dedicated WKUP pins (EXTI 55–60) for any device IRQ managed by OP-TEE? 

I'm using the mp215 with ddr3l (x16) and an ISSI dram ic that is 8Gb (1 gigabyte) which means it's a dual rank configuration compared to a more typical half gigabyte. As far as im aware all 1GB ddr3 dram ic's are dual rank.In AN5723 6.1 Note it says "8 Gbit DDR3 defined by JEDEC is uncommon. Practically, DDR3L density is limited to 4 Gbits (max = 1 Gbyte in total). Single rank only is required. ".an5723 link As far as I understand it it says it's not possible. However this is an older AN and i think it's for the mp25 series only (im using the mp21).However in the ST Wiki "How to setup the DDR configuration" section 5 the exact opposite is implied. This whole section repeatedly describes a "concrete example" of swapping the swapping the mp215-dk's lpddr4 out with a 1GB ddr3 ic. Also using a theoretical dtsi called "stm32mp21-ddr3-1x8Gbits-1x16bits-800MHz.dtsi" and define "DDR_MEM_SIZE 0x40000000" which is 1GB. So this is conflicting info because i dont see how 1gb ddr3 is poss

 Hi~ My board gets stuck at the kernel stage during boot. I've referred to numerous related posts but failed to resolve the issue.The boot file versions I use are OP-TEE 4.0, U-Boot 2023.10 and Linux 6.6.116.The official device tree I referenced is stm32mp157f-ed1.I have attached the boot logs, hardware schematic and device tree files. Please help analyze the root cause of the problem.   stm32f7-i2c i2c@5c002000: pinctrl_select_state_full: pinctrl_config_one: err=-19​    [ 1.741795] arm-scmi firmware:scmi: SCMI Protocol v2.0 'ST:' Firmware version 0x0 [ 1.748959] DEBUG: SCMI CLOCK PROBE STARTED! sdev name: scmi_dev.2 I/TC: SCMI-CLOCK: Reporting 34 clocks to Linux I/TC: SCMI-FW: ETZPC ID 2 DENIED for Non-Secure world! I/TC: SCMI-MSG: NS Request Clock ID 15 (iwdg1), ETZPC 2, Access=FAIL I/TC: SCMI-CLK: ID 15 has no name/not found I/TC: SCMI-FW: ETZPC ID 7 DENIED for Non-Secure world! I/TC: SCMI-MSG: NS Request Clock ID 16 (rng1_k), ETZPC 7, Access=

This might be my misunderstanding of how OVERRIDES work, but I'm building with the recently-released "wrynose_v26.02.18" branch of meta-st-stm32mp and, for the purpose of debugging, I wanted to set:ST_OPTEE_CORE_DEBUG = "y"so I did that in my local.conf file, but after I set it, it still had the value of "n" for the build, so I dumped the value to see how it was (or was not) being set:bitbake-getvar -r optee-os-stm32mp ST_OPTEE_CORE_DEBUG... snip ...# $ST_OPTEE_CORE_DEBUG [3 operations]# set /home/rpjday/BOARDS/nexus/wrynose/build/conf/local.conf:13# "y"# set /home/rpjday/Layers/wrynose/st/meta-st-stm32mp/recipes-security/optee/optee-os-stm32mp-common.inc:37# [_defaultval] "y"# override[stm32mp15common]:set? /home/rpjday/Layers/wrynose/st/meta-st-stm32mp/recipes-security/optee/optee-os-stm32mp-common.inc:38# "n"# pre-expansion value:# "n"ST_OPTEE_CORE_DEBUG="n"You can see how the first line seems to show that I am explicitly setting it in my local.conf, then the processing continues th

Hello all,We are bringing up DDR4 memory on a custom STM32MP257D-based SOM. We have made significant progress but are now blocked on a specific PHY training failure that we cannot diagnose without access to the Synopsys PHY firmware streaming message documentation. We would appreciate any help interpreting the failure and identifying the root cause.Board OverviewSoC: STM32MP257DAK3 (VFBGA424)DRAM: 2× Alliance AS4C512M16D4A-62BIN (DDR4-3200, 8 Gbit × 16, 1.2V, VPP 2.5V)Topology: 32-bit bus, 2 GB total, single rank, soldered downPMIC: STPMIC25APQR (I²C7)Reference HSE: 40 MHz crystalTool chain: STM32CubeMX 6.16.1, STM32CubeIDE 2.0.0, STM32DDRFW-UTIL, STM32CubeProgrammer 2.22Bring-up StatusWe are using STM32DDRFW-UTIL with verbose PHY messaging enabled (hdtctrl = 0x05, custom g_waitfwdone.c patched to decode major messages and dump streaming messages).Power Rails (all verified by HW measurement)VDD_DDR: 1.20 V :white_heavy_check_mark:VTT_DDR: 0.60 V :white_heavy_check_mark:VREF_DDR: 0.60 V

Hello,I have been trying for some time now to connect a Raspberry Pi 7" screen to my STM32MP157F development kit, as the screen that comes with it is too small for my purposes. I do not have a large amount of experience with embedded systems or working at the Linux kernel level. I have been referencing the display wiki page, however I have not been able to get the screen to output anything, only for the backlight to turn on. I have been plugging in the 15 pin connector into the 20 pin CN4 port on the board, which is stated to work on the wiki. I have seen this adapter  referenced online, but I would rather not have to order it if not necessary as I am on a time crunch. I have tried many different device tree configurations, in addition to the example given on the wiki. I am at a loss here, and would greatly appreciate any guidance. Below is snippet from my device tree, which I have modified from the wiki.  &dsi { status = "okay"; ports { port@0 { reg = &

I get this issue in the booting process of Linux. Then nothing else happens, except outputs from Optee. F/TC:? 0 pta_scmi_ocall:207 Posting MSG message on channel 0 root '/dev/disk/by-partuuid/e91c4e10-16e6-4c0e-bd0e-77becf4a3582' doesn't exist or F/TC:? 0 regulator_set_voltage:202 vddcpu 800000uV does not contain a /dev. Question:I assume that this is a common issue for the MP2 platform. Is there anyway I could fix this? Extlinux.conf perhaps? I have the same clock settings as DK.See attached file.

 Hi all,I have a board designed around the STM32MP153FAD (TFBGA257, 10×10 mm, 0.5/0.65 mm pitch, 257 balls). Since the MP153 does not include a DSI controller or GPU, I did not connect any DSI-related power pins or signals. Due to stock shortages, I am now considering switching to the STM32MP157FAD, which shares the same TFBGA257 footprint.My question is: can the STM32MP157FAD be used on this board without connecting the DSI-specific power rails?The DSI power pins that exist on the MP157 but were not populated on my design are:VDD_DSI — DSI I/O supplyVDD1V2_DSI_REG — output of internal 1.2 V DSI regulatorVDD1V2_DSI_PHY — 1.2 V supply for DSI PHYVDDA1V8_DSI — 1.8 V analog supply for DSIMy concern is whether the MP157 will operate correctly (for non-DSI use cases) if these pins receive no supply. (Unused pins are floating right now, is that correct or should I connect it to GND)I have attached my current schematic for reference.Any guidance would be appreciated.Best regardsRegards

Hi~ My board gets stuck at the kernel stage during boot. I've referred to numerous related posts but failed to resolve the issue.The boot file versions I use are OP-TEE 4.0, U-Boot 2023.10 and Linux 6.6.116.The official device tree I referenced is stm32mp157f-ed1.I have attached the boot logs, hardware schematic and device tree files. Please help analyze the root cause of the problem.stm32f7-i2c i2c@5c002000: pinctrl_select_state_full: pinctrl_config_one: err=-19​ [ 1.741795] arm-scmi firmware:scmi: SCMI Protocol v2.0 'ST:' Firmware version 0x0 [ 1.748959] DEBUG: SCMI CLOCK PROBE STARTED! sdev name: scmi_dev.2 I/TC: SCMI-CLOCK: Reporting 34 clocks to Linux I/TC: SCMI-FW: ETZPC ID 2 DENIED for Non-Secure world! I/TC: SCMI-MSG: NS Request Clock ID 15 (iwdg1), ETZPC 2, Access=FAIL I/TC: SCMI-CLK: ID 15 has no name/not found I/TC: SCMI-FW: ETZPC ID 7 DENIED for Non-Secure world! I/TC: SCMI-MSG: NS Request Clock ID 16 (rng1_k), ETZPC 7, Access=FAIL I/TC: SCMI-CLK: ID 16 has no name/not

I wonder why this is happening after U-boot has booten up?It seems that something is NULL. D/TC:? 0 tee_ta_close_session:484 Destroy session Error: eth1@482c0000 address not set. D/TC:? 0 tee_ta_init_session_with_context:562 Re-open trusted service a8cfe406-d4f5-4a2e-9f8d-a25dc754c099 F/TC:? 0 pta_scmi_invoke_command:404 SCMI command 0x3 ptypes 0x3 F/TC:? 0 pta_scmi_invoke_command:404 SCMI command 0x4 ptypes 0x651 D/TC:? 0 tee_ta_close_session:465 csess 0x821301f0 id 1 D/TC:? 0 tee_ta_close_session:484 Destroy session No ethernet found. �7�[r�[999;999H�[6n�8No EFI system partition No EFI system partition Failed to persist EFI variables D/TC:? 0 tee_ta_init_pseudo_ta_session:303 Lookup pseudo TA ab7a617c-b8e7-4d8f-8301-d09b61036b64 D/TC:? 0 tee_ta_init_pseudo_ta_session:315 Open rng.pta D/TC:? 0 tee_ta_init_pseudo_ta_session:330 rng.pta : ab7a617c-b8e7-4d8f-8301-d09b61036b64 F/TC:? 0 plat_prng_add_jitter_entropy:74 0x1C D/TC:? 0 tee_ta_close_session:465 csess 0x821301f0 id 1 D/TC

Dear Team,Could you please guide us on how to set the Linux terminal and SSH login password for the STM32MP257F series platform?We would appreciate it if you could share the required steps or documentation for configuring the password.

I'm working on STM32mp25f-EV1, i have downloaded FLASH-stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18 package but i'm facing problem while accessing SSH.

Hello,I would like to ask about the current status of Bare-Metal support for the Cortex-A35 core on the STM32MP2x platform (STM32MP257F-DK).While searching the ST Community, I came across the following discussion related to this topic:https://community.st.com/t5/stm32-mpus-embedded-software-and/stm32mp257f-dk-bare-metal/td-p/787100Since that discussion is now more than one year old, I wanted to check whether there have been any updates regarding Bare-Metal development support on the STM32MP2 platform.When creating a project in STM32CubeIDE for the STM32MP257F-DK, I could not find an option to create a Bare-Metal project targeting the Cortex-A35 core.Could you please clarify the following:Is there now an official Bare-Metal project template for Cortex-A35 in STM32CubeIDE?Are there any application notes, examples, or documentation demonstrating how to run Cortex-A35 without Linux?Is there any roadmap update regarding official Bare-Metal support for STM32MP2x?Our use case requires:Fast bo

HelloI am developing a custom board using the STM32MP255F-AKUpdates to the DeviceTree (DT) of a custom board placed in the `mata` layer are not reflected in the build.I have already fetched the source using `devtool modify virtual/kernel`The Device Tree for the custom board is located at .../layers/meta-st/meta-st-stm32mp-addons/mx/ddlskt/..Edit the kernel's DT (stm32mp255f-ddlskt-mx.dts)Add a marker to `model = “...”`: `model=“... AAA”`I tried building it$ bitbake virtual/kernelWrote Image.gz, *.dtb, and modules to the SD card and booted(brd-ddlskt) # cat /proc/device-tree/modelSTMicroelectronics custom STM32CubeMX board - openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06AAA has not been added to the modelRunning `cleansstate` before building will reflect the updated device tree$ bitbake -c cleansstate virtual/kernel$ bitbake virtual/kernelWrite Image.gz, *.dtb, and modules to the SD card and boot(brd-ddlskt) # cat /proc/device-tree/modelSTMicroelectronics custom STM32CubeMX board - opens

ObjectiveSign STM32MP23 firmware using AWS KMS ECDSA P-256 keys instead of local private keys, to enable cloud-based signing workflow.Hardware: STM32MP23 seriesHeader Version: 0x00020200 (v2.2.0)Signing Algorithm: ECDSA_SHA_256 (P-256 NIST / secp256r1)Development and Issues summary as followsWe have followed following ways to sign binaries externallyUsing external HSM - SoftHSMThis method shows the exact same issue mentioned in community threadError: Invalid Header version valueHeader v2.2 accepts 8 public keysIf we skip the header version argument, the signing tool fails with CKR_OBJECT_HANDLE_INVALID error.Using PKCS#11 solution along with aws-kms-pkcs11With this method too, we face similar errors as mentioned in #1. With header version 2.2 argument, it gives Invalid header errorIf we skip the header version argument, the signing tool fails with CKR_OBJECT_HANDLE_INVALID error.Developed a custom signing script (Compatible with the STM32 Signing workflow)Firmware s

Hi,I am working on STM32MP135 with SGTL5000 codec using ALSA/ASoC.Playback is working correctly:aplay -D default /home/audio/test_audio.wavBut audio capture is failing with Input/output error:root@stm32mp135-comtrol:~# arecord -D hw:0,1 -f S16_LE -r 48000 -c 2 test.wav Recording WAVE 'test.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo arecord: pcm_read:2272: read error: Input/output errorCurrent status:Playback works correctlyCodec detected properlyI2C communication seems OK during playbackCapture stream fails immediately after startroot@stm32mp135-comtrol:~# arecord -l **** List of CAPTURE Hardware Devices **** card 0: STM32SGTL5000 [STM32-SGTL5000], device 1: 4400a024.audio-controller-sgtl5000 sgtl5000-1 [4400a024.audio-controller-sgtl5000 sgtl5000-1] Subdevices: 1/1 Subdevice #0: subdevice #0 Device tree configuration is attached below.Questions:What usually causes pcm_read: Input/output error in ALSA capture?Could this be related to SAI RX configuration?Is there