STM32 MCUs Embedded software

Hello everyone,I am working with an STM32H743 running at its maximum frequency of 480 MHz. I am trying to implement VBlank synchronization using the LTDC Line Interrupt and CMSIS-RTOS v1 (FreeRTOS). My goal is to unblock a display/rendering task at every frame interval.According to my hardware configuration, the frame time should be 16.6ms (60Hz refresh rate). The mathematical formula confirms this:Total Width = 920, Total Height = 542, Pixel Clock = 30 MHz. (920 * 542) / 30,000,000 Hz = 0.01662s -> 16.62ms.My FreeRTOS configuration is strictly set to configTICK_RATE_HZ = 1000 (1 tick = 1ms).The Problem & Debugging History:Initially, I placed three hardware breakpoints in my code to track execution flow:(1) Right at osSemaphoreWait in the task loop. (2) Inside the HAL_LTDC_LineEventCallback after re-programming the line. (3) Right at the gm_sprintf line where time delta is formatted.If the synchronization loop worked correctly, the debugger should have hit these breakpoints sequ

Hello ST Community,I am working on an STM32N6 project where I need to implement a USB composite device containing three distinct classes: CDC ACM Instance 1 CDC ACM Instance 2 UVC (USB Video Class) Current Status & Setup:The dual CDC ACM implementation is fully stable and working properly. I generated the basic framework using STM32CubeMX (.ioc), which handles the initial USBX configuration, the first CDC instance, and sets up the composite device configuration. Following that, I manually added the second CDC ACM instance code to the project.On top of this working multi-CDC setup, I now want to integrate the Video Class layer. I have enabled the core video class inside the .ioc file and regenerated the code to expand the descriptor framework.The Challenge:To support high-bandwidth Isochronous (ISO) streaming for the Video class component, I integrated the uvcl (USB Video Class Library) middleware extracted from the ST Edge AI Getting Started exampleThe issue started exactly upo

Dear ST Community Team,I am working on an STM32H747 project with a custom bootloader and OTA update mechanism. The OTA download completes successfully, metadata is written, and CRC verification passes. However, after the OTA apply step, the device does not reboot into the new firmware. The system continues running the old application, and I never see the expected reboot message from the bootloader.Details: Device: STM32H7 series Bootloader checks metadata at 0x081E0000 Staging slot at 0x08100000, App slot at 0x08020000 OTA side writes metadata fields (magic, version, staging base, app base, slot size, image size, CRC) Logs show: "Download OK" and "Applying..." but no reboot occurs

MCU / setupSTM32F746IGK, VDD = 3.3 V HSE 16 MHz, PLL: M=8, N=200, P=/2 → SYSCLK = 200 MHz (AHB=200, APB1=/4, APB2=/2) Scale 1 + Over-drive, FLASH_LATENCY_6 Already below the 216 MHz maximum Application executes from the ITCM Flash alias (0x002xxxxx; AXI alias 0x080xxxxx) Cortex I-Cache and D-Cache disabled at startup ART accelerator / prefetch enabled in HAL (ART_ACCELERATOR_ENABLE, PREFETCH_ENABLE) Bare metal, 1 ms cyclic scheduler, no RTOS X-CUBE-STL Flash TM every 1 ms: 1 KB window, HW CRC-32 (poly 0x04C11DB7, init 0xFFFFFFFF, word reverse in / reverse out). Expected CRC is a table built offline from the same image (zlib.crc32 / IEEE 802.3).What we see After several hours in RUN (typically ~11–19 h, not at POST), Flash TM returns STL_FAILED (0xD32D) on a 1 KB window. A software CRC of the same window also mismatches, so this is not only the CRC peripheral.On fail we dumped the 1 KB window from the CPU. The dump CRC always equals the TM computed CRC and differs from the programmed im

Hello,I am working on an STM32 USB CDC (Virtual COM Port) device using the STM32 USB Device Library (CubeMX-generated project).My goal is to have the device appear on Windows as a custom COM port name such as:MO3 Device (COMx)However, I want to achieve this without using a custom INF file, since distributing and installing drivers on every PC is not practical for my use case.From my current understanding:The Product String (iProduct) in usbd_desc.c can be modifiedThe Interface String (iInterface) in the CDC descriptor may also influence the displayed nameWindows typically uses usbser.sys and assigns "USB Serial Device (COMx)" by defaultFriendly Name seems to be controlled primarily via INF, not firmwareI have a few specific questions:Is there any reliable way to influence or override the COM port Friendly Name purely from STM32 firmware (USB descriptors), without an INF file?Does modifying iInterface (or using IAD / composite device descriptors) improve the likelihood of Windows using

I'm trying to get USBX Device MSC to work in Standalone mode (without RTOS).  I loosely followed @B.Montanari 's example in https://community.st.com/t5/stm32-mcus/how-to-implement-usbx-in-standalone-mode/ta-p/614435, and also referred to a CubeMX example for Device MSC which does use an RTOS (STM32Cube_FW_U5_V1.6.0\Projects\STM32U575I-EV\Applications\USBX\Ux_Device_MSC).  I'm running this on an STM32U5 dev kit.There are no errors, Windows recognizes the USB MSC device, and a drive shows up.  But something isn't working quite right, since Windows tells me to insert a disk, won't format the volume, and doesn't seem to recognize its size.I'm not quite sure yet where things are going wrong, but I thought I'd see if this configuration is expected to work or if I'm overlooking any other examples before digging further...

I’m trying to implement USB mass storage class device standalone(no RTOS) on nucleo board STM32U575ZI-Q, using RAM for memory.I tried adapting these steps : but right now, in MX_USBX_Init(), inside  ux_device_stack_initialize  , at this point:#if UX_DEVICE_ENDPOINT_BUFFER_OWNER == 0 /* Obtain some memory. */ endpoints_pool -> ux_slave_endpoint_transfer_request.ux_slave_transfer_request_data_pointer = _ux_utility_memory_allocate(UX_NO_ALIGN, UX_CACHE_SAFE_MEMORY, UX_SLAVE_REQUEST_DATA_MAX_LENGTH); /* Ensure we could allocate memory. */ if (endpoints_pool -> ux_slave_endpoint_transfer_request.ux_slave_transfer_request_data_pointer == UX_NULL) { status = UX_MEMORY_INSUFFICIENT; break; }#endifit goes : status = UX_MEMORY_INSUFFICIENT;Because of that, ux_device_stack_initialize returns UX_ERROR;  witch i think causes Hard fa

Hi All,So I have an STM32F469 on a PCB I’ve designed with a CS4270 audio codec. I am currently working on an I2C driver to initialize the codec (I am using code from Phil’s lab’s video on writing an I2C driver for the CS4270 - video here), however I seem to be running into a “Bus, memory management or usage fault (FORCED)” and an “Instruction access violation (IACCVIOL)” during an I2C register read function.Here is the codec init file. The faults happen in this function call:i2cStatus = CS4270_RegRead(CS4270_REG_DEVICEID, &deviceID);During one of the debug sessions I decided to “step into” every single instruction from the CS4270_RegWrite function (also going through all the HAL functions underneath) and surprisingly the function returned a HAL_OK, which puzzled me and lead me to believe there maybe some kinda timing issue somewhere, which doesn’t manifest itself when breaking down the instructions one by one. Something worth noting is that initially I had initialized the I2C1 modu

Nucleowb55 - USB dongleI am reading form 2 temp sensors (ADT7410) & 2 tri-axial accelerometers (ADXL345) & then sending the temp data, mean accelerometer & FFTs values along each axis. For the accelerometers I read 2000 samples, take the mean & calculate FFT with arm_rfft_fast_f32()  and take the magnitudes using arm_cmplx_mag_f32(). I then pack the temp, acceleration means & top three FFT magnitudes for each axis for transmission over BLE. See code listing. I have no sensors connected and every value I read from the transmitted BLE is 0 (which I expect) except for accelerometer 1’s 3rd peak FFT value for the x-axis which always read as -150669558266527122758482001920.00.This is a sanity check really as I cant find a problem with me senor update function but was wondering if someone can spot something obvious I’ve been missing. (yes I know it might be the BLE client that is messing up but one step at a time) /*FFT & sensor data are held in the following type of

Hi, everyone. I have been doing some courses bout stmf411 programming, it is quite good course. However a question comes up in my mind all the time. How would i learn if i wouldn’t have nobody to teach me all the microcontoller stuff ? or in other way how have the stm32 programmer master learnt to program? is there a special course that is given by STM company?What is the main source for becoming a master in st microcontroller master? I would really appreciate any answer to this that blow my mind … Thanks a lot 

Hi STM Team,I am working on an STM32 + ThreadX + NetX Duo application with the Ethernet interface. I am facing an issue with the NetX Duo DHCP client.My setup is: MCU: STM32N655X0HxQ  RTOS: ThreadX Network stack: NetX Duo Ethernet driver: STM32 HAL Ethernet driver DHCP client: NetX Duo DHCP PC is running as the DHCP server MCU and PC are connected on the same Ethernet network. Observed behaviorThe Ethernet interface works correctly when I configure a static IP address.For example, with:MCU IP : 192.168.50.50Subnet Mask : 255.255.255.0Ethernet communication works correctly.However, when I enable the NetX Duo DHCP client, the MCU remains stuck at:Looking for DHCP server ..The DHCP server is running correctly on my PC.DHCP server configurationMy PC DHCP server is configured as:[SETTINGS]IPPOOL_1=192.168.50.10-254IPBIND_1=192.168.50.1AssociateBindsToPools=1Trace=1DeleteOnRelease=0ExpiredLeaseTimeout=3600[GENERAL]LEASETIME=86400NODETYPE=8SUBNETMASK=255.255.255.0NEXTSERVER=1

STM32G051C8 TIM2 is not initializing using LL_TIM_Init().  After I call the function and look at the registers they are all zero.  All the other TIM seem to work.  

I have a custom board using STM32H735ZGT6 and the LAN8742 Ethernet PHY using RMII. During the execution of CubeMX generated Ethernet initialization code, the MAC software reset bit is not cleared triggering an error. I have read a lot of forum posts about this issue and have verified the following:The RMII reference clock is supplied by the PHY using a 25MHz crystal as in the H723 nucleo board. The 50MHz clock generated by the PHY is present at PA1 pin and verified with an oscilloscope. (see osci image below) VDDCR voltage is 1.2V generated by internal regulator on PHY The PHY hardware reset is supplied by a MCU GPIO, and the resistor straps seem to function properly during reset (probed all with oscilloscope). I also have a pulldown resistor on the LED2 pin so that REFCLKO is generated by PHY. I can communicate through MDIO with the PHY to read out and write to registers, confirming that straps work ok.  The output side of the PHY works, a link is established in both 10 and 100Mbps mo

SDMMC HAL driver implementation is full of timeouts like this:uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U / 1000U); do { if (count-- == 0U) { return SDMMC_ERROR_TIMEOUT; } sta_reg = SDMMCx->STA; } while (SOME_FLAG_NOT_SET);It may work in a single-threaded application on some basic CPU which runs fixed clocks per cycle, but it's not accurate on CPUs with dual-issue pipeline. All preempting interrupts and in case RTOS is used, all higher priority tasks, prolong this timeout. And vice versa - the longer this timeout gets the more it blocks lower priority tasks and interrupts. And the timeout isn't even in microseconds to justify it. SDMMC_CMDTIMEOUT value is 5000 milliseconds (by the comment). It's bad implementation by any standard.It's been so for a long time in many STM32 series (F4, H7, H7RS, N6, etc.). It's reported at least 6 years ago: I may have encountered a bug in SDMMC_GetCmdResp1 ... - STMicroelectronics CommunityI didn't check all the post

Hi,On STM32U575CGU3, calling MX_ADC1_Init() once increases the device current by about +200 µA. After that, even if I run HAL_ADC_DeInit(), reset ADC1, and disable VddA, the extra +200 µA current does not disappear.Here is the minimal code:cint main(void){ HAL_Init(); SystemClock_Config(); MX_GPIO_Init(); MX_GPDMA1_Init(); MX_ADC1_Init(); // <-- Base +200uA increase MX_OCTOSPI1_Init(); MX_SPI1_Init(); MX_USB_OTG_FS_PCD_Init(); MX_USART1_UART_Init(); MX_ICACHE_Init(); // ADC Disable HAL_ADC_DeInit(&hadc1); // <-- This does NOT reduce the +200uA __HAL_RCC_ADC1_FORCE_RESET(); __HAL_RCC_ADC1_RELEASE_RESET(); HAL_PWREx_DisableVddA(); while (1) { __NOP(); }}QuestionDoes ADC_Init enable an internal analog bias that cannot be fully disabled by ADC_DeInit, ADC reset, or VddA OFF? Is there any complete shutdown procedure to fully power down ADC/VREFBUF after initialization?Thanks.

Hii All,I am working on a custom PCB based on the STM32H747IITX MCU, and I am facing an issue with the Ethernet interface.The Ethernet connection is currently not working on my custom board. I have checked the basic hardware connections, but I am unable to identify the root cause.I have attached the Ethernet schematic of my custom PCB for reference.Could someone please help me review the schematic and suggest what I should check?In particular, I would appreciate guidance on:STM32H747IITX Ethernet RMII configuration and pin assignments PHY hardware connections and required configuration PHY reset and power-supply requirements 25 MHz/50 MHz Ethernet clock configuration PHY address and MDIO/MDC communication Required Ethernet termination/bias components STM32 Ethernet GPIO alternate-function configuration Any hardware-specific requirements or common mistakes when designing Ethernet on a custom STM32H747 board Recommended steps to debug whether the issue is on the MCU, PHY, clock, or PCB s

Hello, I have an ST Nucleo U5A5ZJ-Q board. I am powering the board through the CN1 connector and using the ST-LINK at the same time.In the project I am working on, I would like to connect a USB device to the hardware. For this purpose, I want to use the USB Type-C connector.When I connect the sensor to the Type-C connector, it does not receive any power. My assumption is that I cannot power the device through the USB Type-C connector. Also, LD7 does not light up.I wanted to consult you about this before doing anything that might damage the board.In addition I use usb standalone(STM32Cube FW_U5 V1.8.0).Thank you in advance for your support. Best Regards,Faruk

Introduction:Hello ST Team and Community, Following a recent architectural discussion on the Zephyr RTOS project (recommended by @erwango to be shared here), I would like to submit feedback and a feature proposal regarding how the Flexible Memory Controller (FMC) master controller enable gate is handled in the STM32Cube HAL/LL drivers.Background: On newer STM32 architectures (STM32H7, STM32U5, STM32H5, STM32H7RS, STM32N6, STM32MP1/2), the FMC block contains a master peripheral gate bit (FMC_BCR1_FMCEN or FMC_CFGR_FMCEN) which must be asserted for external bus transactions to occur. Currently in the STM32Cube firmware:There is no standalone HAL_FMC_Init() or public LL_FMC_Enable() API.The master gate is only asserted  via the private macro __FMC_ENABLE() inside:  HAL_SRAM_Init()  HAL_SDRAM_Init()  HAL_NOR_Init()  Inversion of responsibility: While this chip-centric approach works seamlessly in standard STM32CubeMX bare-metal projects with discrete SRAM/SDRAM chips, it creates architectu

Hello,I ran into a bug in fx_stm32_sd_driver function.Our firmware was calling fx_media_volume_set on a partitioned card and we found it was corrupting the disk. The issue is  that the FX_DRIVER_BOOT_WRITE case statement hardcodes the boot sector to be at sector number 0. This works for unpartitioned (superfloppy) layouts, but does not work on partitioned SD cards with a master boot record. Calling fx_media_volume_set on a partitioned drive overwrites the MBR instead of the boot sector and corrupts the disk.Note that the FX_DRIVER_BOOT_READ, which also has to manage this problem correctly calculates the offset using the _fx_partition_offset_calculate function.Regards,Mike

Part: STM32U375CE (Cortex-M33 r0p4), ChibiOS, system clock MSIS 4 MHz, FLASH_ACR = 0x100 (0 WS, prefetch on), ICACHE enabled, LDO. Firmware enters Standby from a small function: PWR_CR1.LPMS = 100b, SCB_SCR.SLEEPDEEP = 1, DSB, ISB, WFI. Standby exit is by reset, as documented. Symptom. With identical source, whether the part enters Standby depends on where code lands in the image. Inserting n nops into a function that is not even on the idle path flips idle current between 4.4 uA and 1040 uA (0/2 nops sleep; 4/8/16/32 stall; three trials each). Two builds with a byte-identical 77-instruction arming function, same WFI offset within its flash line, same call list, differing only in two literal-pool data words, behave differently. Whole-tree -O0 always sleeps. Disabling ICACHE, or running the arming sequence from SRAM (.ramtext), makes every build stall. What the stalled state is. Plain stores into retained SRAM2 (PWR_CR1.RRSB3) read back over SWD after connect-under-reset show the firmwa

I am developing a custom embedded device that uses PIMA with USBX in order to access the SD card contents of my PCB from a PC through USB.When UX_PIMA_WITH_MTP_SUPPORT is enabled, the device is correctly detected by Windows and communication works properly.However, in order to correctly represent a hierarchical folder structure in Windows Explorer using MTP, I would need support for command 0x9805 (GetObjPropList, CMD 00000043). As far as I can see, USBX does not implement this command.To avoid implementing the full MTP property system myself, I wanted to use the more generic PIMA behavior instead, where the host requests ObjectHandles each time the user enters a folder, similar to how old digital cameras behaved.The issue is that when I disable UX_PIMA_WITH_MTP_SUPPORT, the PC no longer even recognizes that a USB device is connected. If I enable the macro again, everything works correctly.So my question is:Is disabling UX_PIMA_WITH_MTP_SUPPORT expected to completely break USB enumerat

Hi everyone, I am facing an long-standing issue with a STM32L476RE-powered device loosing UART frames when waking up from UART3 from Stop Mode (will be analyzed on another issue).Prompted by this, I have a generic question for clock configuration after Stop1-2 mode.The device uses HSI & LSE for all of its peripherals, in a bare-metal CubeMX project.Q1: The function __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(RCC_STOP_WAKEUPCLOCK_HSI);is called 1 time before while(1){} loop. Should it be called just once or should it be called every time before calling HAL_SuspendTick();HAL_PWREx_EnterSTOP1Mode(PWR_STOPENTRY_WFI);?Q2: Should we call SystemClock_Config();every time after waking up from Stop mode, despite the fact that the clock selection ( HSI & LSE ) remains the same and no PLL or MSI is used ?Q3: Could calling SystemClock_Config();HAL_ResumeTick();disrupt an ongoing UART-RX ( running on Idle-line callback ) , despite the fact that clock selection is not changing ? Thank you in advance

After i finish my setups according to STM32U0 Bare-Metal USB workshop video. When i compile and load he program to my PCB adn then connect my pcb to PC via USB cable; at the device manager connection seems undefined like the picture below. It says that Unknow USB Device. Does anybody face like this kind of problem? 

I was finding non-deterministic behavior entering standby -- small code changes unrelated to the standby code or devices seemed to prevent standby.  Many hours of debugging later using a joulescope and claude automation, the following fixed the problem -- declare the standby code as noinline (by default, my builds inline small funcitons) void __attribute__((noinline)) enter_standby_mode(void) Also, an attribute to not optimize works as well.   It did not appear that the generated assembly for the standby code changed, but what did change, due to inlining, is the code alignment.  This suggests, but doesn’t confirm, that the fetch pipeline can impact the ability to enter standby on this part.  This was never an issue on the stm32l432.

Hello, I am using an STM32H750I-DK Discovery board with LAN8742 PHY, MII mode, FreeRTOS and LwIP.Ethernet works initially: the STM32 IP appears in arp -a and I can ping it. After some time, the ARP entry disappears and ping gives Request timed out or Destination host unreachable.I have already checked the IP configuration, MII configuration, PHY link, DMA, MPU/cache, and tried disabling RTP traffic, but the issue still occurs.What could cause the STM32H750 Ethernet connection to stop responding to ARP and ping after working normally for some time? What should I check next?