STM32 MCUs

As the title suggests My program on a Nucleo H7S3L8 stops running when D cache is enabled (appearently it does not go into Hardfault mode). However, when the line SCB_EnableDCache() is commented, it starts again running. Since I need D cache I configured the MPU for where the dma buffers of the project are located, since I’ve read that it could be a cache coherency problem with DMAs, but neither this solution solves the problem. I’ve read somewhere that is XSPI2_HSLV OTP that must be enabled on STM32CubeProgrammer, but I’ve checked and this is enabled! How the problem can be solved? I’ll upload the project

Hello ST Community,Following your suggestion @Onizuka09, I developed a software program as per the example STM32H753_SecureMem_ExampleV1.1.After updating the software, I noticed that the part for printing strings via UART (printf) was missing, but it had already been downloaded to the MCU and the software was started. After correcting the code for the printf prints, I no longer want to connect via ST-LINK to download the software to the MCU.So, I try connecting with the STM32CubeProgrammer to attempt to erase all the flash memory. This popup appears:Even if I change modes such as "Under Reset" and "Core Reset," this popup appears:I'm afraid that when the software started, even without seeing the strings in printf via UART, it may have set some security parameters, or option bytes, or disabled Boot for CM7 and CM4.The software had an option that allowed you to reset those parameters and return to the ST-LINK connection mode without any problems.So, is there a way to connect to the STM32

Hi all, Is this possible with a DMA on an STM32N6 device, using the HPDMA/GPDMA? (or I assume the H7 is quite similar, I believe?)Source array: RGBRGBRGBRGB (24 bpp) Destination array: xRGBxRGBxRGBxRGB (32 bpp)Or vice verca:Source array: xRGBxRGBxRGBxRGB (32 bpp) Destination array: RGBRGBRGBRGB (24 bpp) This would solve my issue, where I need both the 24bpp (NPU input) and a jpeg-encodable format (display; which all seem to be either 16bpp or 32bpp). If the above is not possible, then … I’d be open to suggestions on what else to do… Best regards, rphii

Subject: MC Workbench 6.4.2 — Custom Power Board JSON: 'No algorithm available' and missing connection paths errorDear ST Motor Control Support Team,I am writing to request help with creating a custom power board JSON template for MC Workbench 6.4.2.I have a custom BLDC motor control board using the TI DRV8316CT 3-phase integrated FET driver connected to a NUCLEO-G431RB (STM32G431RB). I have created a custom power board JSON file and placed it in the boards/power/ folder, but when I select it in MC Workbench I get the following errors:1. "Mandatory Phase Voltage Generation feature is not defined or there are not connection paths between hardware signals and relative MCU resources for the feature."2. "Mandatory Current Sensing Feature for FOC/HSO algorithm is not defined or there are not connection paths between hardware signals and relative MCU resources for the feature."3. "No algorithm is available for this hardware configuration."My hardware configuration:- Control board: NUCLEO-G43

hello ST CommunityIs it possible to erase all flash memory including the protection by shorting some hardware pins?thanks for supports

Good morning,I'm writing here to ask for help resolving a problem we're having with a custom board that uses a HYPERRAM bus and external RAM chip. Specifically, if Infineon S70KL1282GABHV020 memory is installed on the board, we can easily access byte/word/dword reads and writes, even at a 166MHz clock speed.Needing more external RAM, we installed the ISSI IS66WVH64M8DBLL-166B1LI chip (64MB).However, we can no longer access it properly. Specifically, if we try to access bytes at even addresses, the system seems to work. If we access odd addresses, however, we start to experience access errors. Even lowering the clock frequency to 25MHz, the problem persists.To avoid layout issues, we replaced the hyperram on the STM32H735-DK evb with the ISSI chip, and the behavior is similar.Below is part of the hyperbus initialization code and the code we use for testing the entire memory. /* Initialize OctoSPI ----------------------------------------------------- */ OSPIHandle.Instance = OCTOSPI2;

Hello ST Community,I am working with the STEVAL-DPSLLCK1 LLC full-bridge evaluation kit, specifically the STEVAL-DPS334C1 STM32F334 control board. My goal is to access and monitor the LLC firmware variables using STM32CubeMonitor through ST-LINK.For STM32CubeMonitor variable access, I need a firmware executable with debug symbols, such as an IAR .out file or an ELF file. The .bin file is not sufficient because it does not contain variable names or debug information.I downloaded the available ST firmware package for the LLC kit and opened the IAR workspace in IAR Embedded Workbench for ARM 9.70.4. IAR asked to convert the old project to the newer format, and I accepted the conversion. After conversion, the project fails to build, so no .out file is generated.The main errors are:Error[Pe018]: expected a ")"These occur mainly in:Control_Layer.cFault_Processing.cLLC_PWMnCurrVoltFdbk.cStateMachine.cparser.y / y.tab.cThere are also many warnings like:Warning: The header file 'cmsis_iar.h' is

The STM32G0B1 has a very ugly bug in the bootloader.When I have a write protection on a flash memory area:WRP1A_STRT = 0x0 --> 0x08000000WRP1A_END = 0x1 --> 0x08000800 and then I upload a new firmware to this area the firmware will not be written, because this area is write protected.This is correct.But it is a horrible bug that I send a USB control request withRequest.Function=URB_FUNCTION_CLASS_INTERFACE;Request.Direction=VENDOR_DIRECTION_IN;Request.Request=DFU_GETSTATUS;Request.Value=0;Request.Index=0;Request.Length=6;Result = STDevice_ControlPipeRequest(hDevice, &Request, (BYTE*)pkDfuStatus);and the buggy bootloader returns STATUS_OK (value 0) instead of STATUS_ErrorWRITE (value 3) The user thinks that the firmware was uploaded correctly but the processor is dead because the flash memory is corrupt.  

Hi, Could somebody please explain why CAN on the NUCLEO-C5A3ZG is not populated? 

Hello,Please review my schematic. I am using STM32F030RCT6TR. I have attached screenshots of the schematic and the peripherals interfaced with it. Recommend EMI/EMC related suggestions.NOTE: this STM will be controlled and is interfaced by ESP32 S3 for IO purpose by UART protocol. Following are the sections I have attached screen shots of:STM32 controller ICUARTRTCWATCHDOGDEBUG UARTDECAPAND GATE IC All suggestions/recommendations will be welcomedThank You!

I have a STM32U585 (edit: ...VIT6, so not the one where this doesn't work due to errata) product with Trustzone enabled, Bootlock disabled and RDP level 0.I want to bring this into ST bootloader mode from software (for easy Firmware change via USB).To my understanding that would mean implementing the last entry of Pattern 12 from AN2606  Which means the following code, executed from secure side.RCC->APB3ENR |= RCC_APB3ENR_SYSCFGEN; //clock is disabled after startup, so enable __DSB();//make sure data is written SYSCFG->RSSCMDR = 0x1C0; //pattern from AN2606, RM says any value will do? __DSB();//make sure data is written __NVIC_SystemReset(); //SW reset But all I get is a restart to SECBOOTADD0. And RSSCMDR is zeroed out afterwards, even though the RM states that it is only affected by power on reset.What am I doing wrong?

After a long time, i started to look into using the BLE_Thread_dynamic stack image on WB55 again. First without success with my own code on my own board, which I do think to remember worked before.But afterwards with the BLE_Thread_dyn example on a WB55 Nucleo Board and that doesn't work as well. This is how the FUS Info looksAnd this is where it gets stuck Any Ideas what I might be doing wrong?I already tested with and without "Start Wireless Stack" from the programmer. Not using it, makes it stop even earlier, at hci_reset.Starting to look into older stack images now.Edit: I went back up to 1.18 (using the example code from 1.24, which seems to be untouched since way back) and nothing worked :thinking_face:.

Hello! I have been using the STM32H723ZG Nucleo board and am now trying to ping the STM32 device from a PC through an Ethernet connection, but the ping is not working. For ex: ping 192.168.10.XX (STM32 Static IP) No response is received. My board setup and module details are given below.Board / Setup MCU: STM32H723ZG (Nucleo) Interface: Ethernet (RMII) PHY: (e.g., LAN8742 – please confirm) Stack: lwIP (CubeMX generated) RTOS: FreeRTOS Connection: Ethernet cable through splitter (PC ↔ STM32) PC IP: 192.168.10.XX (static) STM32 IP: 192.168.10.XX (static) STM cube IDE version: 1.18.1 Observed Behavior (STM32 side logs): STM32 successfully receives ARP requests from PC.           Who has 192.168.10.50? Tell 192.168.10.100 (Captured by wireshark).      2. lwIP processes the request and generates an ARP reply.      3. ARP reply frame content (from debug log):           192.168.10.XX is at 00:80:XX:X

We are developing a project using the STM32H743ZIT6 where RTC timekeeping is a critical requirement. During field testing we noticed significant RTC drift on our board. We tested the same hardware three times — each time flashing a different RCC_LSEDRIVE_* setting  to identify which drive level gives the best RTC accuracy. Sharing the full details below test results, firmware, and hardware in case others are facing the same issue.Quick Results We ran a 16-hour test measuring RTC drift on the same STM32H743ZIT6 board, flashed three times with a different RCC_LSEDRIVE_* setting each time."Drive setting Drift over ~16 hours PPM RCC_LSEDRIVE_LOW 69 seconds ~1161 RCC_LSEDRIVE_HIGH 30 seconds ~519 RCC_LSEDRIVE_MEDIUMHIGH 6 seconds ~101 RCC_LSEDRIVE_MEDIUMHIGH gave the best result by a large margin. RCC_LSEDRIVE_LOW — which is often recommended as the default — gave the worst result on our hardware.Hardware DetailsCrystalParameter Value MPN ECS-.327-6-12-TR Frequency

Hello everyone,I have encountered an issue with the STM32WB05KZ on a custom board which only allows me to flash the board under very specific conditions. The first time out of the box, everything works fine, I can flash using a ST-LINK V3-PWR straight from CUBEIDE V1.18.0. After this first time programming, the board becomes fully unresponsive to the debugger. My code does seem to run (verified by two LEDs connected to PB4 and PB5). When using STM32CubeProgrammer, the system reports that it's unable to read the Chip ID. After much trial and error, I've found that by disconnecting the reset pin from the debugger and pressing the Close Debug button in the Debug Authentication (which I haven't enabled anywhere) menu, I can connect to the board through the STMCubeProgrammer software. I was wondering if this behaviour is to be expected, because I can't find it in the Reference manual or Datasheet. And if this behaviour can be disabled. For context:- The board has a 32 MHz crystal and a

How would I go about implementing a USB host for a usb printer. I would like to send things through my STM32 to be printed. I’ve seen adaptations or some work done on the USB printer class as a device but I am unsure how I would do this as a host? Any ideas or already implemented libraries?

We are designing an STM32-based SOM and want to know whether STM32H7 controllers support DDR memory, or if DDR support is available only in STM32MP series. Please suggest compatible STM32 controllers and reference designs for DDR interfacing.

Hello, I started using HAL 2.1.0 which was available as a Pack download in MX2. I recompiled my application and I observed an assert during the DAC initialization in mx_dac1_init when HAL_GPIO_Init is called. hal_gpio_config_t gpio_config; /** [GPIO Pin] ------> [Signal Name] ------> [Labels] PA4 ------> DAC1_OUT1 ------> PA4 **/ gpio_config.mode = HAL_GPIO_MODE_ANALOG; HAL_GPIO_Init(PA4_PORT, PA4_PIN, &gpio_config);Inside the HAL_GPIO_Init the assert occurs due to an incorrect pull mode. if ((mode != LL_GPIO_MODE_ANALOG) || ((mode == LL_GPIO_MODE_ANALOG) && (p_config->pull != HAL_GPIO_PULL_UP))) { // I commented out this line //ASSERT_DBG_PARAM(IS_GPIO_PULL(p_config->pull)); LL_GPIO_SetPinPull(p_gpio, io_msk, (uint32_t)p_config->pull); }I checked the MX2 configuration of the DAC output pin and the pull field is empty and cannot be changed (see screenshot). I attached the ioc2 file for reference.T

Hi,Thanks for your response.Where can I get schematic of STM32100E-EVAL or similar board?    

Dear all!i’m working with STM32H743ZIT6 in ETH RMII, ADC, blink led if i disable MPU, Lwip config, led will blink, when i enable MPU_Config();  SCB_EnableICache();  SCB_EnableDCache();  MX_LWIP_Init(); CPU hang, led didn’t blink, so can you help to take alook my IOC file, and share me how to config this task

Hi ,I have a board that has a STM32H562xxx , I have 4 analog inputs mapped on ADC1 IN1, IN14, IN15 and IN18 single ended … ( PA1, PA2, PA3,PA4 ), TRGO TIM8 I have DCACHE1 disabled HAL_ADC_ConvHalfCpltCallback - gives a flag the cvt is completedI have a uint16_t dmaBuffer[4]When I run it the variable dmaBuffer[0..2] have values ~220 with small oscillations and only dmaBuffer[3]  with correct values from ADC1It’s the first time I used this board and 1st to have CACHE … otherwise I eventually disabled it.Can anyone help ? What info do I need to provide so I get little help make this work ?ThanksCristian 

Hello,im in the process of trying to make a LED Matrix driver with the gpdma on my stm32h562. Currently, I have everything working with one buffer, but want to implement double buffering so i can fill one buffer with data, and read from the other.I was looking around on the internet on how to implement this, but i found only one thread with the same problem, but i cant figure out how to implement the solution into my project, as there is no LLIx.nextLLI definition anywhere. Im using CubeMx to generate me code. /* USER CODE BEGIN Header *//** ****************************************************************************** * File Name : linked_list.c * Description : This file provides code for the configuration * of the LinkedList. ****************************************************************************** * @attention * * Copyright (c) 2026 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be fo

Hello ST Community,Before releasing the next revision of our prototype board, we would like to verify that the hardware implementation of the ST33KTPM2I is correct and that there are no hardware design issues.Currently, the ST33KTPM2I is implemented as an optional component on our board. Before modifying the board design, we would like to perform some basic functional checks to confirm that the device is operating properly.Our interface is SPI.Is there any recommended way to verify communication with the ST33KTPM2I? For example, is it possible to read a device ID register or any other status information to confirm that the device is responding correctly?We reviewed the datasheet, but it does not appear to provide details about accessible registers or a register map. Therefore, we are not sure what commands or procedures can be used to perform a basic hardware validation.Thank you very much for your support.Below is our hardware schematic:  

One of the AF options on SPI1 is to use the SWD debug pins PB3-PB5.How can this be used in reality?Pretty obviously you can't do SWD breakpoints when SPI1 is thus mapped!But assuming no SWD debugging is needed, and you use SWD just to program the FLASH, how does one implement this? AFAICT one would need - on SWD inputs, FLASH loading will work- on SWD outputs (e.g. SWO - the SWV ITM debug output), FLASH loading works because these pins power up in some mode suitable for SWD FLASH programming.Then when the code starts running, you will need some logic to disconnect the debugger, so the clock and data SPI signals can come out, without contention with the debugger.Maybe I am missing something obvious. Or maybe this SPI1 AF mapping option is intended for FLASH programming not via SWD but via a UART, CAN or the weird USB mode.PB3 may not need anything because the SPI CLK is an output and the SWD SWO signal is also an output  

Hello!I am designing a product using the stm32u073 that aims to use the least power. Does internal oscillator use more or less power than the external oscillator on the stm32u073? Is there any white papers on how to achieve the lowest power consumption on the u073?And meanwhile, is there some example implementation for the stm32u073?Thanks