Query Regarding FDCAN Message RAM Configuration on STM32H5 with HAL

[Bhavesh Raju]

Dear ST Team,

I am using the STM32H5 Nucleo-64 board (MB1814) to develop a CAN communication-based application. In my implementation, I am using the TX Queue for message transmission and RX FIFO0 for message reception, both operating through interrupts.

While reviewing the HAL library, I observed that the Message RAM allocation for the RX FIFOs and TX Queue is defined using static, hardcoded macros, as shown below:

#define SRAMCAN_FLS_NBR (28U) /* Max. Filter List Standard Number */
#define SRAMCAN_FLE_NBR ( 8U) /* Max. Filter List Extended Number */
#define SRAMCAN_RF0_NBR ( 3U) /* RX FIFO 0 Elements Number */
#define SRAMCAN_RF1_NBR ( 3U) /* RX FIFO 1 Elements Number */
#define SRAMCAN_TEF_NBR ( 3U) /* TX Event FIFO Elements Number */
#define SRAMCAN_TFQ_NBR ( 3U) /* TX FIFO/Queue Elements Number */

Since my application uses only TX Queue and RX FIFO0, I would like to know whether it is possible to reallocate the Message RAM to increase the number of elements for these two resources while setting the sizes of TX FIFO, Unused filters, and RX FIFO1 to zero, as they are not used in my application.

Could you please advise whether this is supported by the HAL/STM32H5 FDCAN implementation? If so, I would appreciate any recommendations or best practices for configuring the Message RAM efficiently for this use case.

Thank you for your support. I look forward to your guidance.

Kind regards,

Bhavesh Raju

 

[Saket_Om]

Hello ​@Bhavesh Raju

On STM32H5, the FDCAN Message RAM allocation is fixed by hardware, so unused areas such as RX FIFO1, unused filters, or other TX resources cannot be reassigned to increase the size of RX FIFO0 or the TX Queue. In other words, even if your application uses only TX Queue and RX FIFO0, the allocation remains static and is not dynamically configurable through HAL or software. If your application requires larger FIFOs or a more flexible FDCAN Message RAM organization, we recommend considering a device with a more complete FDCAN implementation, such as STM32H7 or STM32N6.