STM32 MCUs

When I compile my code, I get strange errors that make no sense.#define ADC_BUFFER 1000 gives error "expected declaration specifiers or '...' before numeric constant"even though the line above it #define ADC_HIGH_THRESHOLD 3500 doesn't generate an error.HAL_TIM_Base_Start(&htim3); and HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buffer, ADC_BUFFER); both generate "Syntax error".The TIM and ADC Start errors expanded error message is:  error: expected declaration specifiers or '...' before '&' token /* USER CODE END Header *//* Includes ------------------------------------------------------------------*/#include "main.h"/* Private includes ----------------------------------------------------------*//* USER CODE BEGIN Includes */#include <stdlib.h>#include <stdio.h>#include <stdbool.h>#include <stdint.h>#include <inttypes.h>#include "globals.h"/* USER CODE END Includes *//* Private typedef -----------------------------------------------------------*//

 The IssueI'm using **nanoMODBUS** (slave mode) on NUCLEO-F446RE via USART2 (115200 baud, 8N1). The slave exposes two holding registers:- `0x0000`: Potentiometer value (read-only) → `usPotValue`- `0x0001`: LED brightness (read/write) → `usLedBrightness`**The LED is controlled via PWM (TIM2).**BehaviorOperation                                                           Result **Write to `0x0001`** (set LED brightness)      Works consistently — LED dims **Read from `0x0000`** (potentiometer)          Fails most of the time **Read from `0x0001`** (LED brightness)        Fails most of the time **Rare successful read**                                  Both registers return correct values Master Log```Response: emptyResponse: emptyRead OK: [609]              ← Rare successResponse: emptyResponse: emptyResponse: 0180018000         ← Truncated exception (5 bytes instead of 7+)Response: emptyRead OK: [609]              ← Another rare success```The 5-byte response `0180018000`- `01` = Slave addre

I have an STM32U575 MCU with the PH3/BOOT0 pin permanently pulled down to ground. I need to develop a process to flash a proprietary bootloader to fresh boards (ie. the flash is blank) with this configuration. I am currently using STM32CubeProgrammer to connect to a NUCLEO-U575ZI-Q with an external STLINK-V3 over UART/I2C to simulate this process. Even when the board has been reset and the flash is empty, the board does not jump to the system bootloader unless I drive PH3/BOOT0 high. Is the STM32U575 supposed to automatically run the system bootloader when the flash is empty, or will my inability to drive PH3/BOOT0 high on my product prevent me from accessing the system bootloader?

Hi everyone,I'm working on a project using NASA's Core Flight System (cFS) running over RTEMS RTOS, and I need approximately 8MB or more of external RAM for the workspace/heap.Currently, I'm using a NUCLEO-H753ZI board (STM32H753ZI), which only has 1MB of internal SRAM. I've been looking for an easy way to add external RAM, but I'm running into some challenges.My questions: Is there an easy way to add 8MB+ of external RAM to the NUCLEO-H753ZI? I've looked into FMC-based SDRAM shields/expansion boards, but I haven't found any off-the-shelf solutions that work well with this board. Is there a shield, module, or expansion board I should know about? If adding RAM to this board is not practical, which STM32 board would you recommend instead? I need: 8MB+ RAM, Cortex-M7 (or similar performance), and preferably existing RTEMS/cFS support. I've seen mentions of STM32H745I-DISCO or STM32H747I-DISCO having onboard SDRAM, but I'd like community input on the best choice. My sta

Hi,I'm working on a battery-powered sensor with STM32L071CBTx (LQFP48).The device cycles between Standby mode (~12 µA) and short Run mode (~250 ms).Reading RM0377 Section 20 (IWDG), I understand that:1. IWDG cannot be stopped once started (only reset can stop it).2. IWDG clock (LSI) runs in Standby mode.I have two specific questions:Q1: Does STM32L071CB support an IWDG_STDBY option byte bit that freezes    the IWDG counter in Standby mode (similar to STM32G0/WB/U5 series)?    If yes, what is the bit name and how to configure it via HAL?Q2: If Q1 answer is "no", what is the recommended approach to combine    IWDG-based hang protection with Standby-based ultra-low-power    operation? Two options I'm considering:        (a) Use LSI manual stop via RCC_CSR.LSION = 0 before entering        Standby (does IWDG still run if LSI is stopped?)        (b) Software watchdog using a basic timer (TIM6/TIM7) refreshed        in run mode, NVIC_SystemReset() on timeout.Best regards, 

I was trying to use the xcube_TOF application inside the st32cubemx for the stm32h7 nucleo board. However, the tof initialisation is keep getting failed. Is it really possible to implement a i2c connection between x_nucleo_53l8a1 and the stm32H7 nucleo board? I tried to implement the hardware connections just like in the stm32nucleof401re.Could anyone please help me with this?

Hi ST team, I am using STM32L4Q5VGT6 I need to use 2xQuad SPI memory. I need a confirmation whether we can use OCTOSPIM_P1_NCS pin from PE11 & PA2 CS-pin as individual cs pin for both Quad memory chip.  Thanks, 

Environment & hardware:STM32F722RET6:LQFP64USB3300EZKSTM32CubeIDE v2.1.1STM32CubeMX v6.17.0Windows 11 OS Description of problem:I am trying to use ULPI with external HS USB phy with the follwing schematic:when calling MX_USB_DEVICE_Init(), it will be stuck at  /* Required few clock cycles before accessing USB PHY Controller Registers */for (volatile uint32_t i = 0; i < 10; i++) { __NOP(); // No Operation instruction to create a delay} /* Core Soft Reset */ USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; do { count++; if (count > HAL_USB_TIMEOUT) { return HAL_TIMEOUT; } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); return HAL_OK;}in USB_CoreReset(), eventually returning HAL_TIMEOUT. Images of USBx and RCC:USBx before core soft resetUSBx after soft core resetRCC before & after soft core resetMy clock configuration, everything not included in this image is greyed outULPI pins: /**USB_OTG_HS GPIO Configuration PC0

My design uses a STM32H750VBT6 MCU with the USB3300-EZK PHY for high-speed USB. The hardware and software implementations are complete and in general everything works extremely will. The only issue I am seeing is that there are occasional startup problems with the host computer (both Mac and Linux) reading the device descriptor. This occurs about 10% of the time. The Linux error log is: <6>[19177.992026] usb 1-1.1.4: new full-speed USB device number 75 using xhci-hcd<3>[19178.072046] usb 1-1.1.4: device descriptor read/64, error -32<3>[19178.260043] usb 1-1.1.4: device descriptor read/64, error -32<6>[19178.448021] usb 1-1.1.4: new full-speed USB device number 76 using xhci-hcd<3>[19178.528074] usb 1-1.1.4: device descriptor read/64, error -32<3>[19178.716051] usb 1-1.1.4: device descriptor read/64, error -32 A normal connection log as follows: <6>[19166.984026] usb 1-1.1.4: new high-speed USB device number 74 using xhci-hcd<6>[

Hello,I am currently trying to leverage STM32H753 FMC feature to interface with legacy Motorola flexbus style peripheral.I suspect the answer to my question is no but I could not find an explicit statement within documentation saying it is precluded hardware wise :Is there a mode / configuration (down to the registers level) that could allow the write enable signal (WE) to be asserted before the chip select signal (NE) ?Thanks

Hi, If you were to remove the antenna from circuit and transmit on the STM32WL5MOC, would you damage the internal rf power amplifier that transmits the signal due to the signal being fully reflected back to the output of the rf amplifer? Best Regards,Dave

Could you please let me know when STM32 CubeMX 2 is expected to support USB device and host middleware?Also, will STM32H, STM32F, and other STM32 series continue to be supported in CubeMX 2?

Hello STM Community,I am facing an XCP protocol timeout when trying to use Simulink Monitor & Tune (External Mode) with a custom STM32H750VBTx board and an ST-LINK-V3 (COM10, 115200 baud).The Setup & Symptoms: What works: Code generation and flashing complete successfully. "Build, Deploy and Start" works perfectly (e.g., standard LED blink routines run fine). What fails: Clicking "Connect" for External Mode immediately times out with: XCP internal error: timeout expired, in response to XCP CONNECT command. Hardware verified: Standard UART communication has been tested separately on this custom board and works flawlessly at 115200 baud. No other software is locking the COM port. Questions: Cache/MPU: Since this is an STM32H7, do the buffers used by the Simulink XCP serial stack require specific MPU or D-Cache configurations to prevent data coherency issues? Interrupt Conflict: Is there a known issue where the XCP background task gets starved by higher priority model execut

Implementation: STM32F405, using Timer 2 to synchronously trigger ADC1 and ADC2 acquisition with DMA.Problem: The sampling frequencies of ADC1 and ADC2 are correct, but the phase difference keeps changing for each acquisition – they are not sampling synchronously, and the captured waveform does not match what is observed on the oscilloscope.Question: 1，How can I debug and resolve this issue?2， I found that I must call HAL_ADC_Start(&hadc2) before HAL_ADCEx_MultiModeStart_DMA(&hadc1, ...);  Is this correct？     HAL_ADC_Start(&hadc2);     HAL_ADCEx_MultiModeStart_DMA(&hadc1,(uint32_t*)adc_dma_buf,POINTS_PER_CH);Specific code: /* USER CODE BEGIN Header *//**  ******************************************************************************  * @file           : main.c  * @brief          : Main program body  ******************************************************************************  * @attention  *  * Copyright (c) 2026 STMicroelectronics.  * All rights reserved.  *  * This

I’m seeing that the X-CUBE-FREERTOS packege is being updated to 1.6.0 to support FreeRTOS 11.2From the changelog it says that it’s restricted to    - Restricted to processor vendor: STMicroelectronics:13    - Restricted to processor name matching: STM32H5*|STM32U5*|STM32C0*|STM32WBA*|STM32U0*|STM32N6*|STM32U3*Are there any plans to bring to STM32H7* as well?

Hi,I am using an STM32U585 MCU in a Iot Application . I am facing an issue during power-up.Problem description: When the main supply is turned ON, the MCU appears to hang or gets stuck somewhere during startup. If I press the reset pushbutton connected to NRST, the MCU starts working normally. After that, the system runs without any issues. Every time I turn the main supply OFF and ON again, the same problem occurs. A manual reset is required for proper operation. This behavior is observed with different power supplies as well. Hardware details: MCU: STM32U585 NRST pin: 10k  pull-up or 100nf capacitor connected Pushbutton reset available on NRST   Any suggestions or recommended checks would be greatly appreciated.Thank you.

Hello,I realized, that there are different informations about the features of LPUART1 in the datasheet and refmanual.The datasheets (at least DS15125 and DS15136) probably falsely specify in Table 8, that the LPUART1 features receiver timeout interrupt, modbus com and auto baudrate detection.In the refmanual (RM0522, Table 439) these features are specified as not supported. This seams to be the right information, when looking into CubeMX2, where the RTO for LPUART1 can not be activated.  

Hardware: STM32N657 + DCMIPP CSI-2 Host (Synopsys DWC D-PHY). Sensor: onsemi AR0144CS, MIPI 2-lane, RAW12 (DT 0x2C), 27 MHz EXTCLK, link ≈  445 Mbps/lane, PHYBitrate = DCMIPP_CSI_PHY_BT_450.  Symptom - the receiver clock lane never enters HS:  - The sensor is definitely streaming: its FRAME_COUNT (0x303A) advances ~58 fps read over I2C; RESET_REGISTER = 0x005C (STREAM=1).  - The CSI host decodes exactly one Frame-Start short packet, then nothing — csi_sof=1, csi_eof=0, framebuffer stays black, and all error  counters are zero (ECC=0, CRC=0, SYNC=0, no SoT errors).  - CSI_SR1 = 0x64100000 → ACTCLF (bit31) = 0 (RM0486 §40.9: ACTCLF = D-PHY_RX RxClkActiveHS). STOPCLF (bit28) = 0. So the clock lane never  reaches sustained HS.  Key control comparison (same board, same DCMIPP/CSI receiver): a Sony IMX708 in continuous-clock mode reaches ACTCLF=1 ("CDR locked") in ~1  ms and captures full frames. Only the AR0144 (which I believe emits a non-continuous/gated clock) fails — ACTCLF stays 0.  Wh

Hello,I'm looking for advice / help with Trust-Zone enabled project.  I'm just getting started with Trust-Zone so there is a bit of a learning curve I guess, and a lot I dont know.  I'm debugging in VSCode.  Debug config shown at bottom of message.  To start, I programmed TZEN for my STM32U575 to 1, but no read out protection is enabled.    The secure part of the project, which runs first (its ISR table is at 0xc000000 ) only does a handful of things currently, including running this - it is stock standard STM code I think.static void NonSecure_Init(void) { funcptr_NS NonSecure_ResetHandler; SCB_NS->VTOR = VTOR_TABLE_NS_START_ADDR; /* Set non-secure main stack (MSP_NS) */ __TZ_set_MSP_NS((*(uint32_t *)VTOR_TABLE_NS_START_ADDR)); /* Get non-secure reset handler */ NonSecure_ResetHandler = (funcptr_NS)(*((uint32_t *)((VTOR_TABLE_NS_START_ADDR) + 4U))); /* Start non-secure state software application */ NonSecure_ResetHandler(); } When I start

Hello there!It would be really great if someone can look into this.I even tested it by reading the state of the pin and the MCU detected when the button was pressed, however when I set it up to use EXTI, its not detecting the interrupt. Could there be something wrong with the IC?Any help would be greatly appreciated.   /* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2024 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ /* USER CODE END Header */ /* Includes ---------

Hello, I am trying to setup TIM5 channel 1 to output a signal on its output pin. I generated the code using STM32CubeMX2. I am getting an assert failed during initialization.mx_system_init() calls mx_tim5_init() which calls HAL_TIM_OC_SetConfigChannel(): oc_config.polarity = HAL_TIM_OC_HIGH; oc_config.idle_state = HAL_TIM_OC_IDLE_STATE_RESET; if (HAL_TIM_OC_SetConfigChannel(&hTIM5, HAL_TIM_CHANNEL_1, &oc_config) != HAL_OK) { return NULL; } In HAL_TIM_OC_SetConfigChannel function assert fails at the following line: ASSERT_DBG_PARAM(IS_TIM_OC_OVERRIDE_STATE(p_config->override_state)); ASSERT_DBG_PARAM(IS_TIM_OC_BREAK_MODE(p_config->break_mode));The value of the override_state shown by the debugger  is: (HAL_TIM_OC_OVERRIDE_SET | unknown: 0xfa). If I comment out the assert it will assert on the next line (break_mode). If I comment that line out as well the code outputs a signal on the pin. I attached my MX2 file. What am I missing?-Gil 

I use STM32F407VG Discovery evolution board to drive genuine BTT TMC2209 v1.3 motor drivers and NEMA11 motors. There are 4 TMC2209 drivers. I am using bare-metal CMSIS custom firmware.  Motor power rail is 24 volts, logic voltage is provided from a stable power source. The issue is whenever the Discovery board is power reset motor operation stuck, only first motor, M0 is working. In this stage STEP, DIR, UART, Enable operations are working fine (I use USB communication with Raspberry Pi and communication also work fine). After motor power rail is hard reset it will start to run all motors. Anyone faced this issue and a solution?

Hi everyone,I'm using an STM32U599VJT on a custom board and I'm having trouble getting USB to work.ProblemThe MCU cannot be detected by a PC through USB under any condition: USB DFU mode does not appear when entering the system bootloader. USB also does not work from my application firmware. Windows reports "Unknown USB Device (Device Descriptor Request Failed)" (Error 43). What I Have Verified The MCU successfully enters the system bootloader. I can program and communicate with the device through the UART bootloader without any issue. Therefore, I am confident that the MCU is actually entering the ROM bootloader. VDDUSB is powered at 3.3 V. VBUS sensing is connected and reads approximately 3.3 V when connected to the PC. USB-C CC configuration is present and the board receives power correctly from the PC. USB D+ measures approximately 3 V. USB D− measures approximately 0 V. The board uses a 25 MHz HSE crystal. The USB signals pass through a USB mux that is shared

Hi everyone, I have successfully set up a camera and the NPU working together on a Nucleo N6 to get proper outputs from the latter, which is great. I also have a way to see the image and can verify the outputs live.However, that only works when I launch the firmware by adding the Application to the startup, loading its symbols, flashing the trusted application and starting to debug the FSBL… After that starts, I can detach the debugger to let it run the application. (BOOT0 off, BOOT1 on)When I now flash both trusted binaries and launch without the debugger (BOOT0 and BOOT1 off) it starts normally and I see the live image. But there are no inference results (which takes the same amount of time as when it worked)… What could I be missing?Best regards, rphii

Hello,I am facing an issue with the STM32C5 HAL SPI driver related to CRC error detection.In my setup, CRC is enabled for SPI. When a CRC error occurs, I can observe that the CRCERR flag is set before the transfer is closed. However, the CRC error is never reported via the HAL error callback.Looking into the HAL implementation, I noticed the following behavior:SPI_CloseTransfer() calls LL_SPI_Disable()After disabling SPI, SPI_CloseTransfer() checks LL_SPI_IsActiveFlag_CRCERR()When this check is performed after LL_SPI_Disable(), the CRC error is no longer detectedIf I move the LL_SPI_IsActiveFlag_CRCERR() check before LL_SPI_Disable(), the CRC error is detected correctlyAdditionally, in my case SPI_CloseTransfer() is called from HAL_SPI_IRQHandler(), but:the return value of SPI_CloseTransfer() is not evaluatedonly the Tx/Rx complete callback is invokedmy error callback is never called, even though a CRC error has occurredFrom my understanding:LL_SPI_Disable() itself does not clear the C