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Associate II
July 17, 2026
Solved

Duplicate SAI clocks outputs to other pins Nucleo F756ZG

  • July 17, 2026
  • 1 reply
  • 44 views

Hello,

 

I am currently using SAI1A as Master and SAI2B as synchronous slave on the Nucleo F756ZG to send data to 2 DACs.

One DAC is connected to SAI1A pins and the other is connected to SAI2B pins.

 

The issue : 

  • SAI1A needs to be configured as master and SAI2B as its slave to be synchronized so the data are sent at the exact same moment to both DACs
  • The second DAC is routed to the SAI2B SD, SCK, FS and MCLK pins but these are not used because the SAI2B is slave
  • In this configuration, DAC 2 does not receive any signal from SAI2B SCK, FS and MCLK pins
  • If both SAIs are configured as masters, there is a 20 microsecond latency between the data frames because the SAIs are not synchronized so there is a delay because of calling twice HAL_SAI_Trasmit_DMA function. I cannot afford this delay in my use case.

 

Is there a way to clone or duplicate the SAI1A clock outputs to SAI2B pins so DAC 2 receives the clock signals as well, without modifying the routing ? Or reduce the delay to some nanoseconds with both SAIs in Master mode ?

 

Thanks

Best answer by AScha.3

Hi,

>Is there a way to clone or duplicate the SAI1A clock outputs to SAI2B pins so DAC 2 receives the clock signals as well, without modifying the routing ?

Yes, just you have to connect the clk+frame signals to the slave : set it to async.slave , then the pins for putting in the clk+frame are activated.

If on sync.slave , clk+frame are internal connected, only SD data coming out; and dac get clk+frame from the master output.

You have to make the connection external on the board.

1 reply

AScha.3
AScha.3Best answer
Super User
July 17, 2026

Hi,

>Is there a way to clone or duplicate the SAI1A clock outputs to SAI2B pins so DAC 2 receives the clock signals as well, without modifying the routing ?

Yes, just you have to connect the clk+frame signals to the slave : set it to async.slave , then the pins for putting in the clk+frame are activated.

If on sync.slave , clk+frame are internal connected, only SD data coming out; and dac get clk+frame from the master output.

You have to make the connection external on the board.

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